From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50136) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zn0ig-0003tg-PD for qemu-devel@nongnu.org; Fri, 16 Oct 2015 04:50:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zn0if-00073c-KI for qemu-devel@nongnu.org; Fri, 16 Oct 2015 04:50:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35403) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zn0if-00073V-CM for qemu-devel@nongnu.org; Fri, 16 Oct 2015 04:50:33 -0400 From: Paolo Bonzini Date: Fri, 16 Oct 2015 10:49:33 +0200 Message-Id: <1444985411-17803-12-git-send-email-pbonzini@redhat.com> In-Reply-To: <1444985411-17803-1-git-send-email-pbonzini@redhat.com> References: <1444985411-17803-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 11/49] target-i386/kvm: set Hyper-V features cpuid bit HV_X64_MSR_VP_INDEX_AVAILABLE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Marcelo Tosatti , Andrey Smetanin , "Denis V. Lunev" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson From: Andrey Smetanin Hyper-V features bit HV_X64_MSR_VP_INDEX_AVAILABLE value is based on cpu option "hv-vpindex" and kernel support of HV_X64_MSR_VP_INDEX. Signed-off-by: Andrey Smetanin Signed-off-by: Denis V. Lunev CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost CC: "Andreas F=C3=A4rber" CC: Marcelo Tosatti Message-Id: <1442397584-16698-3-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini --- target-i386/cpu-qom.h | 1 + target-i386/cpu.c | 1 + target-i386/kvm.c | 11 ++++++++++- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index ed8fd18..8b5439b 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -91,6 +91,7 @@ typedef struct X86CPU { bool hyperv_time; bool hyperv_crash; bool hyperv_reset; + bool hyperv_vpindex; bool check_cpuid; bool enforce_cpuid; bool expose_kvm; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 230ecf4..741b94e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -3141,6 +3141,7 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_BOOL("hv-time", X86CPU, hyperv_time, false), DEFINE_PROP_BOOL("hv-crash", X86CPU, hyperv_crash, false), DEFINE_PROP_BOOL("hv-reset", X86CPU, hyperv_reset, false), + DEFINE_PROP_BOOL("hv-vpindex", X86CPU, hyperv_vpindex, false), DEFINE_PROP_BOOL("check", X86CPU, check_cpuid, false), DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false), DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 401a2f3..4d5ff9a 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -83,6 +83,7 @@ static bool has_msr_hv_vapic; static bool has_msr_hv_tsc; static bool has_msr_hv_crash; static bool has_msr_hv_reset; +static bool has_msr_hv_vpindex; static bool has_msr_mtrr; static bool has_msr_xss; =20 @@ -462,7 +463,8 @@ static bool hyperv_enabled(X86CPU *cpu) cpu->hyperv_time || cpu->hyperv_relaxed_timing || cpu->hyperv_crash || - cpu->hyperv_reset); + cpu->hyperv_reset || + cpu->hyperv_vpindex); } =20 static Error *invtsc_mig_blocker; @@ -534,6 +536,9 @@ int kvm_arch_init_vcpu(CPUState *cs) if (cpu->hyperv_reset && has_msr_hv_reset) { c->eax |=3D HV_X64_MSR_RESET_AVAILABLE; } + if (cpu->hyperv_vpindex && has_msr_hv_vpindex) { + c->eax |=3D HV_X64_MSR_VP_INDEX_AVAILABLE; + } c =3D &cpuid_data.entries[cpuid_i++]; c->function =3D HYPERV_CPUID_ENLIGHTMENT_INFO; if (cpu->hyperv_relaxed_timing) { @@ -866,6 +871,10 @@ static int kvm_get_supported_msrs(KVMState *s) has_msr_hv_reset =3D true; continue; } + if (kvm_msr_list->indices[i] =3D=3D HV_X64_MSR_VP_INDEX)= { + has_msr_hv_vpindex =3D true; + continue; + } } } =20 --=20 2.5.0