From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40738) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoEQR-0005Dn-LW for qemu-devel@nongnu.org; Mon, 19 Oct 2015 13:40:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZoEQO-00058E-Se for qemu-devel@nongnu.org; Mon, 19 Oct 2015 13:40:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42637) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoEQO-000582-FQ for qemu-devel@nongnu.org; Mon, 19 Oct 2015 13:40:44 -0400 From: Eduardo Habkost Date: Mon, 19 Oct 2015 15:40:09 -0200 Message-Id: <1445276410-5031-9-git-send-email-ehabkost@redhat.com> In-Reply-To: <1445276410-5031-1-git-send-email-ehabkost@redhat.com> References: <1445276410-5031-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [PATCH v3 8/9] target-i386: Ensure always-1 bits on DR6 can't be cleared List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, Paolo Bonzini , Richard Henderson Bits 4-11 and 16-31 on DR6 are documented as always 1, so ensure they can't be cleared by software. Reviewed-by: Richard Henderson Signed-off-by: Eduardo Habkost --- target-i386/bpt_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c index 144cfd4..dac1b1a 100644 --- a/target-i386/bpt_helper.c +++ b/target-i386/bpt_helper.c @@ -262,7 +262,7 @@ void helper_set_dr(CPUX86State *env, int reg, target_ulong t0) } /* fallthru */ case 6: - env->dr[6] = t0; + env->dr[6] = t0 | DR6_FIXED_1; return; case 5: if (env->cr[4] & CR4_DE_MASK) { -- 2.1.0