From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58987) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zp1An-0000v4-Bm for qemu-devel@nongnu.org; Wed, 21 Oct 2015 17:43:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zp1Aj-0001OY-OY for qemu-devel@nongnu.org; Wed, 21 Oct 2015 17:43:52 -0400 Received: from mail-qg0-x236.google.com ([2607:f8b0:400d:c04::236]:34121) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zp1Aj-0001OU-IT for qemu-devel@nongnu.org; Wed, 21 Oct 2015 17:43:49 -0400 Received: by qgem9 with SMTP id m9so40250817qge.1 for ; Wed, 21 Oct 2015 14:43:49 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 21 Oct 2015 11:42:53 -1000 Message-Id: <1445463779-5823-5-git-send-email-rth@twiddle.net> In-Reply-To: <1445463779-5823-1-git-send-email-rth@twiddle.net> References: <1445463779-5823-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 04/10] tcg-opc.h: Simplify insn_start def List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, James Hogan From: James Hogan We already have a TLADDR_ARGS definition, so rearrange the order slightly and use it in the definition of insn_start, instead of having an #ifdef. Reviewed-by: Aurelien Jarno Signed-off-by: James Hogan Signed-off-by: Richard Henderson Message-Id: <1443788657-14537-2-git-send-email-james.hogan@imgtec.com> --- tcg/tcg-opc.h | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index c6f9570..6d0410c 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -173,18 +173,15 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) DEF(muluh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i64)) DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) +#define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) +#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) + /* QEMU specific */ -#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS -DEF(insn_start, 0, 0, 2 * TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT) -#else -DEF(insn_start, 0, 0, TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT) -#endif +DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS, + TCG_OPF_NOT_PRESENT) DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END) DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END) -#define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) -#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) - DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) DEF(qemu_st_i32, 0, TLADDR_ARGS + 1, 1, -- 2.4.3