From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58986) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zp1An-0000v2-Bt for qemu-devel@nongnu.org; Wed, 21 Oct 2015 17:43:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zp1Al-0001Oh-Oi for qemu-devel@nongnu.org; Wed, 21 Oct 2015 17:43:52 -0400 Received: from mail-qg0-x232.google.com ([2607:f8b0:400d:c04::232]:35198) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zp1Al-0001Od-K8 for qemu-devel@nongnu.org; Wed, 21 Oct 2015 17:43:51 -0400 Received: by qgbb65 with SMTP id b65so40222503qgb.2 for ; Wed, 21 Oct 2015 14:43:51 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 21 Oct 2015 11:42:54 -1000 Message-Id: <1445463779-5823-6-git-send-email-rth@twiddle.net> In-Reply-To: <1445463779-5823-1-git-send-email-rth@twiddle.net> References: <1445463779-5823-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 05/10] disas/mips: Add R6 jr/jr.hb to disassembler List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, James Hogan From: James Hogan MIPS r6 encodes jr as jalr zero, and jr.hb as jalr.hb zero, so add these encodings to the MIPS disassembly table. Reviewed-by: Aurelien Jarno Reviewed-by: Leon Alrae Signed-off-by: James Hogan Signed-off-by: Richard Henderson Message-Id: <1443788657-14537-3-git-send-email-james.hogan@imgtec.com> --- disas/mips.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/disas/mips.c b/disas/mips.c index 01336a8..bf0bbaf 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2420,9 +2420,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1 }, {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33 }, {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, +{"jr", "s", 0x00000009, 0xfc1fffff, UBD|RD_s, 0, I32R6 }, /* jalr */ /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with the same hazard barrier effect. */ {"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD|RD_s, 0, I32 }, +{"jr.hb", "s", 0x00000409, 0xfc1fffff, UBD|RD_s, 0, I32R6 }, /* jalr.hb */ {"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, /* jr */ /* SVR4 PIC code requires special handling for j, so it must be a macro. */ -- 2.4.3