From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41417) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpIdi-0002D5-VE for qemu-devel@nongnu.org; Thu, 22 Oct 2015 12:22:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZpIde-0004JN-97 for qemu-devel@nongnu.org; Thu, 22 Oct 2015 12:22:54 -0400 Received: from mx2.suse.de ([195.135.220.15]:48729) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpIde-0004Ia-2D for qemu-devel@nongnu.org; Thu, 22 Oct 2015 12:22:50 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 22 Oct 2015 18:22:39 +0200 Message-Id: <1445530959-19309-9-git-send-email-afaerber@suse.de> In-Reply-To: <1445530959-19309-1-git-send-email-afaerber@suse.de> References: <1445530959-19309-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 8/8] disas: QOMify alpha specific disas setup List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , Richard Henderson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Peter Crosthwaite From: Peter Crosthwaite Move the target_disas() alpha specifics to the CPUClass::disas_set_info() hook and delete the #ifdef specific code in disas.c. This also makes monitor_disas() consistent with target_disas(), as monitor_disas() was missing a set of the BFD (This was an omission from commit b9bec751c8c8b08d8055da32306eb105db03031b). Signed-off-by: Peter Crosthwaite Acked-by: Richard Henderson Signed-off-by: Andreas F=C3=A4rber --- disas.c | 5 ----- target-alpha/cpu.c | 8 ++++++++ 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/disas.c b/disas.c index bf16c42..4e11944 100644 --- a/disas.c +++ b/disas.c @@ -230,9 +230,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ul= ong code, } s.info.disassembler_options =3D (char *)"any"; s.info.print_insn =3D print_insn_ppc; -#elif defined(TARGET_ALPHA) - s.info.mach =3D bfd_mach_alpha_ev6; - s.info.print_insn =3D print_insn_alpha; #endif if (s.info.print_insn =3D=3D NULL) { s.info.print_insn =3D print_insn_od_target; @@ -404,8 +401,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.info.mach =3D bfd_mach_i386_i386; } s.info.print_insn =3D print_insn_i386; -#elif defined(TARGET_ALPHA) - s.info.print_insn =3D print_insn_alpha; #elif defined(TARGET_PPC) if (flags & 0xFFFF) { /* If we have a precise definition of the instruction set, use i= t. */ diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index ff1926a..e5bdfa8 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -46,6 +46,12 @@ static bool alpha_cpu_has_work(CPUState *cs) | CPU_INTERRUPT_MCHK); } =20 +static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *in= fo) +{ + info->mach =3D bfd_mach_alpha_ev6; + info->print_insn =3D print_insn_alpha; +} + static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -297,6 +303,8 @@ static void alpha_cpu_class_init(ObjectClass *oc, voi= d *data) cc->get_phys_page_debug =3D alpha_cpu_get_phys_page_debug; dc->vmsd =3D &vmstate_alpha_cpu; #endif + cc->disas_set_info =3D alpha_cpu_disas_set_info; + cc->gdb_num_core_regs =3D 67; =20 /* --=20 2.1.4