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From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23
Date: Fri, 23 Oct 2015 13:32:59 -0200	[thread overview]
Message-ID: <1445614392-26687-1-git-send-email-ehabkost@redhat.com> (raw)

Sorry for not submitting this a few days earlier.

The following changes since commit 147482ae35b896808af68c0051ad86d3aae12979:

  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151023' into staging (2015-10-23 13:09:09 +0100)

are available in the git repository at:

  git://github.com/ehabkost/qemu.git tags/x86-pull-request

for you to fetch changes up to 31bfa2a40004204aee503c6417fbafb5d17e0a51:

  vl: trivial: minor tweaks to a max-cpu error msg (2015-10-23 13:11:52 -0200)

----------------------------------------------------------------
X86 queue, 2015-10-23

----------------------------------------------------------------

Andrew Jones (1):
  vl: trivial: minor tweaks to a max-cpu error msg

Eduardo Habkost (6):
  target-i386: Disable cache info passthrough by default
  target-i386: Ensure bit 10 on DR7 is never cleared
  target-i386: Handle I/O breakpoints
  target-i386: Ensure always-1 bits on DR6 can't be cleared
  target-i386: Add DE to TCG_FEATURES
  target-i386: Use 1UL for bit shift

Paolo Bonzini (1):
  target-i386: allow any alignment for SMBASE

Richard Henderson (5):
  target-i386: Introduce cpu_x86_update_dr7
  target-i386: Re-introduce optimal breakpoint removal
  target-i386: Move hw_*breakpoint_* functions
  target-i386: Optimize setting dr[0-3]
  target-i386: Check CR4[DE] for processing DR4/DR5

 include/hw/i386/pc.h     |   5 ++
 target-i386/bpt_helper.c | 224 ++++++++++++++++++++++++++++++++++++++---------
 target-i386/cpu.c        |   8 +-
 target-i386/cpu.h        |  35 ++------
 target-i386/helper.h     |   4 +-
 target-i386/machine.c    |   8 +-
 target-i386/seg_helper.c |   8 +-
 target-i386/smm_helper.c |   4 +-
 target-i386/translate.c  |  30 +++++--
 vl.c                     |   4 +-
 10 files changed, 236 insertions(+), 94 deletions(-)

-- 
2.1.0

             reply	other threads:[~2015-10-23 15:33 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-23 15:32 Eduardo Habkost [this message]
2015-10-23 15:33 ` [Qemu-devel] [PULL 01/13] target-i386: allow any alignment for SMBASE Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 02/13] target-i386: Disable cache info passthrough by default Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 03/13] target-i386: Introduce cpu_x86_update_dr7 Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 04/13] target-i386: Re-introduce optimal breakpoint removal Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 05/13] target-i386: Ensure bit 10 on DR7 is never cleared Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 06/13] target-i386: Move hw_*breakpoint_* functions Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 07/13] target-i386: Optimize setting dr[0-3] Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 08/13] target-i386: Handle I/O breakpoints Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 09/13] target-i386: Check CR4[DE] for processing DR4/DR5 Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 10/13] target-i386: Ensure always-1 bits on DR6 can't be cleared Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 11/13] target-i386: Add DE to TCG_FEATURES Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 12/13] target-i386: Use 1UL for bit shift Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 13/13] vl: trivial: minor tweaks to a max-cpu error msg Eduardo Habkost
2015-10-23 17:14 ` [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23 Peter Maydell

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