From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56578) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpeLJ-0001Xh-Ct for qemu-devel@nongnu.org; Fri, 23 Oct 2015 11:33:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZpeLG-0001h9-3B for qemu-devel@nongnu.org; Fri, 23 Oct 2015 11:33:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48775) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpeLF-0001gx-Uv for qemu-devel@nongnu.org; Fri, 23 Oct 2015 11:33:18 -0400 From: Eduardo Habkost Date: Fri, 23 Oct 2015 13:32:59 -0200 Message-Id: <1445614392-26687-1-git-send-email-ehabkost@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org, Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Sorry for not submitting this a few days earlier. The following changes since commit 147482ae35b896808af68c0051ad86d3aae129= 79: Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151023' i= nto staging (2015-10-23 13:09:09 +0100) are available in the git repository at: git://github.com/ehabkost/qemu.git tags/x86-pull-request for you to fetch changes up to 31bfa2a40004204aee503c6417fbafb5d17e0a51: vl: trivial: minor tweaks to a max-cpu error msg (2015-10-23 13:11:52 -= 0200) ---------------------------------------------------------------- X86 queue, 2015-10-23 ---------------------------------------------------------------- Andrew Jones (1): vl: trivial: minor tweaks to a max-cpu error msg Eduardo Habkost (6): target-i386: Disable cache info passthrough by default target-i386: Ensure bit 10 on DR7 is never cleared target-i386: Handle I/O breakpoints target-i386: Ensure always-1 bits on DR6 can't be cleared target-i386: Add DE to TCG_FEATURES target-i386: Use 1UL for bit shift Paolo Bonzini (1): target-i386: allow any alignment for SMBASE Richard Henderson (5): target-i386: Introduce cpu_x86_update_dr7 target-i386: Re-introduce optimal breakpoint removal target-i386: Move hw_*breakpoint_* functions target-i386: Optimize setting dr[0-3] target-i386: Check CR4[DE] for processing DR4/DR5 include/hw/i386/pc.h | 5 ++ target-i386/bpt_helper.c | 224 ++++++++++++++++++++++++++++++++++++++---= ------ target-i386/cpu.c | 8 +- target-i386/cpu.h | 35 ++------ target-i386/helper.h | 4 +- target-i386/machine.c | 8 +- target-i386/seg_helper.c | 8 +- target-i386/smm_helper.c | 4 +- target-i386/translate.c | 30 +++++-- vl.c | 4 +- 10 files changed, 236 insertions(+), 94 deletions(-) --=20 2.1.0