From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56738) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpeLp-0002Vr-P3 for qemu-devel@nongnu.org; Fri, 23 Oct 2015 11:33:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZpeLo-0001wK-Sk for qemu-devel@nongnu.org; Fri, 23 Oct 2015 11:33:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50367) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpeLo-0001wC-Nb for qemu-devel@nongnu.org; Fri, 23 Oct 2015 11:33:52 -0400 From: Eduardo Habkost Date: Fri, 23 Oct 2015 13:33:09 -0200 Message-Id: <1445614392-26687-11-git-send-email-ehabkost@redhat.com> In-Reply-To: <1445614392-26687-1-git-send-email-ehabkost@redhat.com> References: <1445614392-26687-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [PULL 10/13] target-i386: Ensure always-1 bits on DR6 can't be cleared List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org, Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Bits 4-11 and 16-31 on DR6 are documented as always 1, so ensure they can't be cleared by software. Reviewed-by: Richard Henderson Signed-off-by: Eduardo Habkost --- target-i386/bpt_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c index 144cfd4..dac1b1a 100644 --- a/target-i386/bpt_helper.c +++ b/target-i386/bpt_helper.c @@ -262,7 +262,7 @@ void helper_set_dr(CPUX86State *env, int reg, target_ulong t0) } /* fallthru */ case 6: - env->dr[6] = t0; + env->dr[6] = t0 | DR6_FIXED_1; return; case 5: if (env->cr[4] & CR4_DE_MASK) { -- 2.1.0