From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Andreas Färber" <afaerber@suse.de>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 03/13] target-i386: Introduce cpu_x86_update_dr7
Date: Fri, 23 Oct 2015 13:33:02 -0200 [thread overview]
Message-ID: <1445614392-26687-4-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1445614392-26687-1-git-send-email-ehabkost@redhat.com>
From: Richard Henderson <rth@twiddle.net>
This moves the last of the iteration over breakpoints into
the bpt_helper.c file. This also allows us to make several
breakpoint functions static.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target-i386/bpt_helper.c | 29 ++++++++++++++++++-----------
target-i386/cpu.h | 4 ++--
target-i386/machine.c | 8 ++++++--
target-i386/seg_helper.c | 8 +-------
4 files changed, 27 insertions(+), 22 deletions(-)
diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c
index c071c24..f14788a 100644
--- a/target-i386/bpt_helper.c
+++ b/target-i386/bpt_helper.c
@@ -21,7 +21,8 @@
#include "exec/helper-proto.h"
-void hw_breakpoint_insert(CPUX86State *env, int index)
+#ifndef CONFIG_USER_ONLY
+static void hw_breakpoint_insert(CPUX86State *env, int index)
{
CPUState *cs = CPU(x86_env_get_cpu(env));
int type = 0, err = 0;
@@ -55,7 +56,7 @@ void hw_breakpoint_insert(CPUX86State *env, int index)
}
}
-void hw_breakpoint_remove(CPUX86State *env, int index)
+static void hw_breakpoint_remove(CPUX86State *env, int index)
{
CPUState *cs;
@@ -79,6 +80,20 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
}
}
+void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
+{
+ int i;
+
+ for (i = 0; i < DR7_MAX_BP; i++) {
+ hw_breakpoint_remove(env, i);
+ }
+ env->dr[7] = new_dr7;
+ for (i = 0; i < DR7_MAX_BP; i++) {
+ hw_breakpoint_insert(env, i);
+ }
+}
+#endif
+
static bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update)
{
target_ulong dr6;
@@ -161,20 +176,12 @@ void helper_single_step(CPUX86State *env)
void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
{
#ifndef CONFIG_USER_ONLY
- int i;
-
if (reg < 4) {
hw_breakpoint_remove(env, reg);
env->dr[reg] = t0;
hw_breakpoint_insert(env, reg);
} else if (reg == 7) {
- for (i = 0; i < DR7_MAX_BP; i++) {
- hw_breakpoint_remove(env, i);
- }
- env->dr[7] = t0;
- for (i = 0; i < DR7_MAX_BP; i++) {
- hw_breakpoint_insert(env, i);
- }
+ cpu_x86_update_dr7(env, t0);
} else {
env->dr[reg] = t0;
}
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index a395b4b..70d1b21 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -235,6 +235,7 @@
#define DR7_TYPE_SHIFT 16
#define DR7_LEN_SHIFT 18
#define DR7_FIXED_1 0x00000400
+#define DR7_GLOBAL_BP_MASK 0xaa
#define DR7_LOCAL_BP_MASK 0x55
#define DR7_MAX_BP 4
#define DR7_TYPE_BP_INST 0x0
@@ -1154,14 +1155,13 @@ static inline int hw_breakpoint_len(unsigned long dr7, int index)
return (len == 2) ? 8 : len + 1;
}
-void hw_breakpoint_insert(CPUX86State *env, int index);
-void hw_breakpoint_remove(CPUX86State *env, int index);
void breakpoint_handler(CPUState *cs);
/* will be suppressed */
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
+void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
/* hw/pc.c */
uint64_t cpu_get_tsc(CPUX86State *env);
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 6737366..a18e16e 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -367,8 +367,12 @@ static int cpu_post_load(void *opaque, int version_id)
cpu_breakpoint_remove_all(cs, BP_CPU);
cpu_watchpoint_remove_all(cs, BP_CPU);
- for (i = 0; i < DR7_MAX_BP; i++) {
- hw_breakpoint_insert(env, i);
+ {
+ /* Indicate all breakpoints disabled, as they are, then
+ let the helper re-enable them. */
+ target_ulong dr7 = env->dr[7];
+ env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
+ cpu_x86_update_dr7(env, dr7);
}
tlb_flush(cs, 1);
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 1cbe559..20ee892 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -501,13 +501,7 @@ static void switch_tss_ra(CPUX86State *env, int tss_selector,
#ifndef CONFIG_USER_ONLY
/* reset local breakpoints */
if (env->dr[7] & DR7_LOCAL_BP_MASK) {
- for (i = 0; i < DR7_MAX_BP; i++) {
- if (hw_local_breakpoint_enabled(env->dr[7], i) &&
- !hw_global_breakpoint_enabled(env->dr[7], i)) {
- hw_breakpoint_remove(env, i);
- }
- }
- env->dr[7] &= ~DR7_LOCAL_BP_MASK;
+ cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
}
#endif
}
--
2.1.0
next prev parent reply other threads:[~2015-10-23 15:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-23 15:32 [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23 Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 01/13] target-i386: allow any alignment for SMBASE Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 02/13] target-i386: Disable cache info passthrough by default Eduardo Habkost
2015-10-23 15:33 ` Eduardo Habkost [this message]
2015-10-23 15:33 ` [Qemu-devel] [PULL 04/13] target-i386: Re-introduce optimal breakpoint removal Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 05/13] target-i386: Ensure bit 10 on DR7 is never cleared Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 06/13] target-i386: Move hw_*breakpoint_* functions Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 07/13] target-i386: Optimize setting dr[0-3] Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 08/13] target-i386: Handle I/O breakpoints Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 09/13] target-i386: Check CR4[DE] for processing DR4/DR5 Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 10/13] target-i386: Ensure always-1 bits on DR6 can't be cleared Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 11/13] target-i386: Add DE to TCG_FEATURES Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 12/13] target-i386: Use 1UL for bit shift Eduardo Habkost
2015-10-23 15:33 ` [Qemu-devel] [PULL 13/13] vl: trivial: minor tweaks to a max-cpu error msg Eduardo Habkost
2015-10-23 17:14 ` [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23 Peter Maydell
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