From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44922) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqhPr-0007Fp-4y for qemu-devel@nongnu.org; Mon, 26 Oct 2015 09:02:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZqhPq-0002VX-CI for qemu-devel@nongnu.org; Mon, 26 Oct 2015 09:02:23 -0400 Received: from mail-pa0-x22c.google.com ([2607:f8b0:400e:c03::22c]:34762) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqhPq-0002VS-72 for qemu-devel@nongnu.org; Mon, 26 Oct 2015 09:02:22 -0400 Received: by padhk11 with SMTP id hk11so188560161pad.1 for ; Mon, 26 Oct 2015 06:02:21 -0700 (PDT) From: "Edgar E. Iglesias" Date: Mon, 26 Oct 2015 14:01:55 +0100 Message-Id: <1445864527-14520-3-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1445864527-14520-1-git-send-email-edgar.iglesias@gmail.com> References: <1445864527-14520-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v5 02/14] target-arm: lpae: Make t0sz and t1sz signed integers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: laurent.desnogues@gmail.com, serge.fdrv@gmail.com, edgar.iglesias@xilinx.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Make t0sz and t1sz signed integers to match tsz and to make it easier to implement support for AArch32 negative t0sz. t1sz is changed for consistensy. No functional change. Reviewed-by: Peter Maydell Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 3aec303..149a857 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6519,12 +6519,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * This is a Non-secure PL0/1 stage 1 translation, so controlled by * TTBCR/TTBR0/TTBR1 in accordance with ARM ARM DDI0406C table B-32: */ - uint32_t t0sz = extract32(tcr->raw_tcr, 0, 6); + int32_t t0sz = extract32(tcr->raw_tcr, 0, 6); if (va_size == 64) { t0sz = MIN(t0sz, 39); t0sz = MAX(t0sz, 16); } - uint32_t t1sz = extract32(tcr->raw_tcr, 16, 6); + int32_t t1sz = extract32(tcr->raw_tcr, 16, 6); if (va_size == 64) { t1sz = MIN(t1sz, 39); t1sz = MAX(t1sz, 16); -- 1.9.1