From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56795) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zr5Jf-0001VD-Gp for qemu-devel@nongnu.org; Tue, 27 Oct 2015 10:33:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zr5Jd-0007VK-71 for qemu-devel@nongnu.org; Tue, 27 Oct 2015 10:33:35 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35204) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zr5Jc-0007Sy-VV for qemu-devel@nongnu.org; Tue, 27 Oct 2015 10:33:33 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Zr5Ja-0000Uu-5L for qemu-devel@nongnu.org; Tue, 27 Oct 2015 14:33:30 +0000 From: Peter Maydell Date: Tue, 27 Oct 2015 14:33:16 +0000 Message-Id: <1445956409-1818-15-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1445956409-1818-1-git-send-email-peter.maydell@linaro.org> References: <1445956409-1818-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 14/27] target-arm: Add HPFAR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: "Edgar E. Iglesias" Reviewed-by: Alex Bennée Signed-off-by: Edgar E. Iglesias Message-id: 1445864527-14520-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- target-arm/cpu.h | 1 + target-arm/helper.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index a271205..815fef8 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -279,6 +279,7 @@ typedef struct CPUARMState { }; uint64_t far_el[4]; }; + uint64_t hpfar_el2; union { /* Translation result. */ struct { uint64_t _unused_par_0; diff --git a/target-arm/helper.c b/target-arm/helper.c index aba5025..7e35585 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3230,6 +3230,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { { .name = "MDCR_EL2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1, .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any, + .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL }; @@ -3476,6 +3480,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 1, .access = PL2_RW, .resetvalue = 0, .fieldoffset = offsetof(CPUARMState, cp15.mdcr_el2), }, + { .name = "HPFAR", .state = ARM_CP_STATE_AA32, + .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, .accessfn = access_el3_aa32ns, + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, + .access = PL2_RW, + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, REGINFO_SENTINEL }; -- 1.9.1