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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 12/13] hw/arm/virt-acpi-build: Add GICC ACPI subtable for GICv3
Date: Tue,  3 Nov 2015 14:13:18 +0000	[thread overview]
Message-ID: <1446559999-12413-13-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1446559999-12413-1-git-send-email-peter.maydell@linaro.org>

From: Shannon Zhao <shannon.zhao@linaro.org>

When booting VM with GICv3, the kernel needs GICC ACPI subtable to
initialize the CPUs, e.g. MPIDR information. This adds GICC ACPI
subtable for GICv3, but set GICC base address only when gic_version == 2
since it donesn't need GICC base address for GICv3.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1446131773-5018-1-git-send-email-shannon.zhao@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt-acpi-build.c | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 1430125..b170dfa 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -449,6 +449,22 @@ build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info,
     gicd->length = sizeof(*gicd);
     gicd->base_address = memmap[VIRT_GIC_DIST].base;
 
+    for (i = 0; i < guest_info->smp_cpus; i++) {
+        AcpiMadtGenericInterrupt *gicc = acpi_data_push(table_data,
+                                                     sizeof *gicc);
+        gicc->type = ACPI_APIC_GENERIC_INTERRUPT;
+        gicc->length = sizeof(*gicc);
+        if (guest_info->gic_version == 2) {
+            gicc->base_address = memmap[VIRT_GIC_CPU].base;
+        }
+        gicc->cpu_interface_number = i;
+        gicc->arm_mpidr = i;
+        gicc->uid = i;
+        if (test_bit(i, cpuinfo->found_cpus)) {
+            gicc->flags = cpu_to_le32(ACPI_GICC_ENABLED);
+        }
+    }
+
     if (guest_info->gic_version == 3) {
         AcpiMadtGenericRedistributor *gicr = acpi_data_push(table_data,
                                                          sizeof *gicr);
@@ -458,20 +474,6 @@ build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info,
         gicr->base_address = cpu_to_le64(memmap[VIRT_GIC_REDIST].base);
         gicr->range_length = cpu_to_le32(memmap[VIRT_GIC_REDIST].size);
     } else {
-        for (i = 0; i < guest_info->smp_cpus; i++) {
-            AcpiMadtGenericInterrupt *gicc = acpi_data_push(table_data,
-                                                         sizeof *gicc);
-            gicc->type = ACPI_APIC_GENERIC_INTERRUPT;
-            gicc->length = sizeof(*gicc);
-            gicc->base_address = memmap[VIRT_GIC_CPU].base;
-            gicc->cpu_interface_number = i;
-            gicc->arm_mpidr = i;
-            gicc->uid = i;
-            if (test_bit(i, cpuinfo->found_cpus)) {
-                gicc->flags = cpu_to_le32(ACPI_GICC_ENABLED);
-            }
-        }
-
         gic_msi = acpi_data_push(table_data, sizeof *gic_msi);
         gic_msi->type = ACPI_APIC_GENERIC_MSI_FRAME;
         gic_msi->length = sizeof(*gic_msi);
-- 
1.9.1

  parent reply	other threads:[~2015-11-03 14:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-03 14:13 [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 01/13] target-arm: Add and use symbolic names for register banks Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 02/13] arm: boot: Adjust indentation of FIXUP comments Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 03/13] arm: boot: Add board specific setup code API Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 04/13] arm: xilinx_zynq: Add linux pre-boot Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 05/13] armv7-m: Return DeviceState* from armv7m_init() Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 06/13] armv7-m: Implement SYSRESETREQ Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 07/13] arm: stellaris: exit on external reset request Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 08/13] MAINTAINERS: Add new qemu-arm mailing list to ARM related entries Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 09/13] target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32 Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 10/13] target-arm: Report S/NS status in the CPU debug logs Peter Maydell
2015-11-03 14:13 ` [Qemu-devel] [PULL 11/13] hw/arm/virt-acpi-build: _CCA attribute is compulsory Peter Maydell
2015-11-03 14:13 ` Peter Maydell [this message]
2015-11-03 14:13 ` [Qemu-devel] [PULL 13/13] ARM: ACPI: Fix MPIDR value in ACPI table Peter Maydell
2015-11-03 15:31 ` [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell

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