From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org, qemu-arm@nongnu.org,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH 13/16] target-arm: Add QOM property for Secure memory region
Date: Thu, 5 Nov 2015 18:15:55 +0000 [thread overview]
Message-ID: <1446747358-18214-14-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1446747358-18214-1-git-send-email-peter.maydell@linaro.org>
Add QOM property to the ARM CPU which boards can use to tell us what
memory region to use for secure accesses. Nonsecure accesses
go via the memory region specified with the base CPU class 'memory'
property.
By default, if no secure region is specified it is the same as the
nonsecure region, and if no nonsecure region is specified we will use
address_space_memory.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu-qom.h | 3 +++
target-arm/cpu.c | 26 ++++++++++++++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 53d3129..75dc74e 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -87,6 +87,9 @@ typedef struct ARMCPU {
/* GPIO outputs for generic timer */
qemu_irq gt_timer_outputs[NUM_GTIMERS];
+ /* MemoryRegion to use for secure physical accesses */
+ MemoryRegion *secure_memory;
+
/* 'compatible' string for this CPU for Linux device trees */
const char *dtb_compatible;
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 7789d50..85e2bc8 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -542,6 +542,15 @@ static void arm_cpu_post_init(Object *obj)
*/
qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el3_property,
&error_abort);
+
+#ifndef CONFIG_USER_ONLY
+ object_property_add_link(obj, "secure-memory",
+ TYPE_MEMORY_REGION,
+ (Object **)&cpu->secure_memory,
+ qdev_prop_allow_set_link_before_realize,
+ OBJ_PROP_LINK_UNREF_ON_RELEASE,
+ &error_abort);
+#endif
}
if (arm_feature(&cpu->env, ARM_FEATURE_MPU)) {
@@ -665,6 +674,23 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
init_cpreg_list(cpu);
+#ifndef CONFIG_USER_ONLY
+ if (cpu->has_el3) {
+ AddressSpace *as;
+
+ if (!cpu->secure_memory) {
+ cpu->secure_memory = cs->memory;
+ }
+ as = address_space_init_shareable(cpu->secure_memory,
+ "cpu-secure-memory");
+ cpu_address_space_init(cs, as, ARMASIdx_S);
+ }
+ cpu_address_space_init(cs,
+ address_space_init_shareable(cs->memory,
+ "cpu-memory"),
+ ARMASIdx_NS);
+#endif
+
qemu_init_vcpu(cs);
cpu_reset(cs);
--
1.9.1
next prev parent reply other threads:[~2015-11-05 18:16 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-05 18:15 [Qemu-devel] [PATCH 00/16] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 01/16] exec.c: Don't set cpu->as until cpu_address_space_init Peter Maydell
2015-11-06 13:04 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 02/16] exec.c: Allow target CPUs to define multiple AddressSpaces Peter Maydell
2015-11-06 13:21 ` Edgar E. Iglesias
2015-11-06 13:34 ` Peter Maydell
2015-11-06 13:49 ` Edgar E. Iglesias
2015-11-09 10:32 ` Paolo Bonzini
2015-11-09 10:30 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 03/16] tlb_set_page_with_attrs: Take argument specifying AddressSpace to use Peter Maydell
2015-11-06 13:27 ` Edgar E. Iglesias
2015-11-06 13:41 ` Peter Maydell
2015-11-06 13:49 ` Edgar E. Iglesias
2015-11-06 13:52 ` Edgar E. Iglesias
2015-11-09 10:44 ` Paolo Bonzini
2015-11-09 10:49 ` Peter Maydell
2015-11-10 16:13 ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 04/16] exec.c: Add address space index to CPUIOTLBEntry Peter Maydell
2015-11-06 13:34 ` Edgar E. Iglesias
2015-11-06 13:45 ` Peter Maydell
2015-11-06 14:13 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 05/16] exec.c: Add cpu_get_address_space() Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method Peter Maydell
2015-11-06 13:37 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 07/16] exec.c: Use cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-06 13:38 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 08/16] exec.c: Have one io_mem_watch per AddressSpace Peter Maydell
2015-11-06 13:45 ` Edgar E. Iglesias
2015-11-09 10:49 ` Paolo Bonzini
2015-11-09 10:54 ` Peter Maydell
2015-11-09 11:00 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 09/16] target-arm: Support multiple address spaces in page table walks Peter Maydell
2015-11-06 14:22 ` Edgar E. Iglesias
2015-11-09 10:51 ` Paolo Bonzini
2015-11-09 10:58 ` Peter Maydell
2015-11-09 11:03 ` Paolo Bonzini
2015-11-09 11:09 ` Peter Maydell
2015-11-09 11:19 ` Paolo Bonzini
2015-11-09 11:22 ` Peter Maydell
2015-11-13 18:51 ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 10/16] target-arm: Implement cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-06 14:23 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 11/16] memory: Add address_space_init_shareable() Peter Maydell
2015-11-06 14:29 ` Edgar E. Iglesias
2015-11-06 14:49 ` Peter Maydell
2015-11-09 10:55 ` Paolo Bonzini
2015-11-09 10:59 ` Peter Maydell
2015-11-09 11:02 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 12/16] qom/cpu: Add MemoryRegion property Peter Maydell
2015-11-06 14:31 ` Edgar E. Iglesias
2015-11-09 10:56 ` Paolo Bonzini
2015-11-05 18:15 ` Peter Maydell [this message]
2015-11-06 14:33 ` [Qemu-devel] [PATCH 13/16] target-arm: Add QOM property for Secure memory region Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 14/16] hw/arm/virt: Wire up memory region to CPUs explicitly Peter Maydell
2015-11-06 14:45 ` Edgar E. Iglesias
2015-11-06 14:51 ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 15/16] [RFC] hw/arm/virt: add secure memory region and UART Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 16/16] HACK: rearrange the virt memory map to suit OP-TEE Peter Maydell
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