From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org, qemu-arm@nongnu.org,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method
Date: Thu, 5 Nov 2015 18:15:48 +0000 [thread overview]
Message-ID: <1446747358-18214-7-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1446747358-18214-1-git-send-email-peter.maydell@linaro.org>
Add a new optional method get_phys_page_asidx_debug to CPUClass.
This is like the existing get_phys_page_debug, but also returns
the address space index to use for the access. This is necessary
for CPUs which have multiple address spaces.
We provide a wrapper function cpu_get_phys_page_asidx_debug()
which falls back to the existing get_phys_page_debug(), so we
don't need to change every target CPU.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/qom/cpu.h | 34 ++++++++++++++++++++++++++++++++--
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index ae17932..10ef5cc 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -98,6 +98,9 @@ struct TranslationBlock;
* #TranslationBlock.
* @handle_mmu_fault: Callback for handling an MMU fault.
* @get_phys_page_debug: Callback for obtaining a physical address.
+ * @get_phys_page_asidx_debug: Callback for obtaining a physical address and the
+ * associated address index. CPUs which have more than one AddressSpace
+ * should implement this instead of get_phys_page_debug.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
* @debug_excp_handler: Callback for handling debug exceptions.
@@ -152,6 +155,7 @@ typedef struct CPUClass {
int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
int mmu_index);
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
+ hwaddr (*get_phys_page_asidx_debug)(CPUState *cpu, vaddr addr, int *asidx);
int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
void (*debug_excp_handler)(CPUState *cpu);
@@ -445,6 +449,32 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
#ifndef CONFIG_USER_ONLY
/**
+ * cpu_get_phys_page_asidx_debug:
+ * @cpu: The CPU to obtain the physical page address for.
+ * @addr: The virtual address.
+ * @asidx: Updated on return with the address space index for this access.
+ *
+ * Obtains the physical page corresponding to a virtual one, together
+ * with the corresponding address space index indicating which AddressSpace
+ * to look the physical address up in.
+ * Use it only for debugging because no protection checks are done.
+ *
+ * Returns: Corresponding physical page address or -1 if no page found.
+ */
+static inline hwaddr cpu_get_phys_page_asidx_debug(CPUState *cpu, vaddr addr,
+ int *asidx)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ if (cc->get_phys_page_asidx_debug) {
+ return cc->get_phys_page_asidx_debug(cpu, addr, asidx);
+ }
+ /* Fallback for CPUs which don't have multiple address spaces */
+ *asidx = 0;
+ return cc->get_phys_page_debug(cpu, addr);
+}
+
+/**
* cpu_get_phys_page_debug:
* @cpu: The CPU to obtain the physical page address for.
* @addr: The virtual address.
@@ -456,9 +486,9 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
*/
static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
{
- CPUClass *cc = CPU_GET_CLASS(cpu);
+ int asidx;
- return cc->get_phys_page_debug(cpu, addr);
+ return cpu_get_phys_page_asidx_debug(cpu, addr, &asidx);
}
#endif
--
1.9.1
next prev parent reply other threads:[~2015-11-05 18:16 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-05 18:15 [Qemu-devel] [PATCH 00/16] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 01/16] exec.c: Don't set cpu->as until cpu_address_space_init Peter Maydell
2015-11-06 13:04 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 02/16] exec.c: Allow target CPUs to define multiple AddressSpaces Peter Maydell
2015-11-06 13:21 ` Edgar E. Iglesias
2015-11-06 13:34 ` Peter Maydell
2015-11-06 13:49 ` Edgar E. Iglesias
2015-11-09 10:32 ` Paolo Bonzini
2015-11-09 10:30 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 03/16] tlb_set_page_with_attrs: Take argument specifying AddressSpace to use Peter Maydell
2015-11-06 13:27 ` Edgar E. Iglesias
2015-11-06 13:41 ` Peter Maydell
2015-11-06 13:49 ` Edgar E. Iglesias
2015-11-06 13:52 ` Edgar E. Iglesias
2015-11-09 10:44 ` Paolo Bonzini
2015-11-09 10:49 ` Peter Maydell
2015-11-10 16:13 ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 04/16] exec.c: Add address space index to CPUIOTLBEntry Peter Maydell
2015-11-06 13:34 ` Edgar E. Iglesias
2015-11-06 13:45 ` Peter Maydell
2015-11-06 14:13 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 05/16] exec.c: Add cpu_get_address_space() Peter Maydell
2015-11-05 18:15 ` Peter Maydell [this message]
2015-11-06 13:37 ` [Qemu-devel] [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 07/16] exec.c: Use cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-06 13:38 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 08/16] exec.c: Have one io_mem_watch per AddressSpace Peter Maydell
2015-11-06 13:45 ` Edgar E. Iglesias
2015-11-09 10:49 ` Paolo Bonzini
2015-11-09 10:54 ` Peter Maydell
2015-11-09 11:00 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 09/16] target-arm: Support multiple address spaces in page table walks Peter Maydell
2015-11-06 14:22 ` Edgar E. Iglesias
2015-11-09 10:51 ` Paolo Bonzini
2015-11-09 10:58 ` Peter Maydell
2015-11-09 11:03 ` Paolo Bonzini
2015-11-09 11:09 ` Peter Maydell
2015-11-09 11:19 ` Paolo Bonzini
2015-11-09 11:22 ` Peter Maydell
2015-11-13 18:51 ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 10/16] target-arm: Implement cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-06 14:23 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 11/16] memory: Add address_space_init_shareable() Peter Maydell
2015-11-06 14:29 ` Edgar E. Iglesias
2015-11-06 14:49 ` Peter Maydell
2015-11-09 10:55 ` Paolo Bonzini
2015-11-09 10:59 ` Peter Maydell
2015-11-09 11:02 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 12/16] qom/cpu: Add MemoryRegion property Peter Maydell
2015-11-06 14:31 ` Edgar E. Iglesias
2015-11-09 10:56 ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 13/16] target-arm: Add QOM property for Secure memory region Peter Maydell
2015-11-06 14:33 ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 14/16] hw/arm/virt: Wire up memory region to CPUs explicitly Peter Maydell
2015-11-06 14:45 ` Edgar E. Iglesias
2015-11-06 14:51 ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 15/16] [RFC] hw/arm/virt: add secure memory region and UART Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 16/16] HACK: rearrange the virt memory map to suit OP-TEE Peter Maydell
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