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From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <rth@twiddle.net>,
	"Andreas Färber" <afaerber@suse.de>,
	qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 3/5] target-i386: Remove ABM from qemu64 CPU model
Date: Thu,  5 Nov 2015 17:37:09 -0200	[thread overview]
Message-ID: <1446752231-3715-4-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1446752231-3715-1-git-send-email-ehabkost@redhat.com>

ABM is not available on Sandy Bridge and older, and we want to make the
default CPU runnable in most hosts, so it won't be enabled by default in
KVM mode.

We should eventually have all features supported by TCG enabled by
default in TCG mode, but as we don't have a good mechanism today to
ensure we have different defaults in KVM and TCG mode, disable ABM in
the qemu64 CPU model entirely.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 include/hw/i386/pc.h | 5 +++++
 target-i386/cpu.c    | 3 +--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index bc82c14..8b54863 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -332,6 +332,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
             .driver   = "qemu64" "-" TYPE_X86_CPU,\
             .property = "sse4a",\
             .value    = "on",\
+        },\
+        {\
+            .driver   = "qemu64" "-" TYPE_X86_CPU,\
+            .property = "abm",\
+            .value    = "on",\
         },
 
 #define PC_COMPAT_2_3 \
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5aa3ce7..90e4529 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -675,8 +675,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
         .features[FEAT_8000_0001_EDX] =
             CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
         .features[FEAT_8000_0001_ECX] =
-            CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
-            CPUID_EXT3_ABM,
+            CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM,
         .xlevel = 0x8000000A,
     },
     {
-- 
2.1.0

  parent reply	other threads:[~2015-11-05 19:37 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05 19:37 [Qemu-devel] [PULL 0/5] X86 queue, 2015-11-05 Eduardo Habkost
2015-11-05 19:37 ` [Qemu-devel] [PULL 1/5] target-i386: Set "check=off" by default on pc-*-2.4 and older Eduardo Habkost
2015-11-05 19:37 ` [Qemu-devel] [PULL 2/5] target-i386: Remove SSE4a from qemu64 CPU model Eduardo Habkost
2015-11-05 19:37 ` Eduardo Habkost [this message]
2015-11-05 19:37 ` [Qemu-devel] [PULL 4/5] target-i386: Remove POPCNT from qemu64 and qemu32 CPU models Eduardo Habkost
2015-11-05 19:37 ` [Qemu-devel] [PULL 5/5] target-i386: Enable clflushopt/clwb/pcommit instructions Eduardo Habkost
2015-11-06 11:03 ` [Qemu-devel] [PULL 0/5] X86 queue, 2015-11-05 Peter Maydell

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