[Qemu-devel] [PULL 0/3] target-i386: tcg: Handle clflushopt/clwb/pcommit instructions

[Qemu-devel] [PULL 0/3] target-i386: tcg: Handle clflushopt/clwb/pcommit instructions

[Eduardo Habkost]

The following changes since commit 4b59f39bc9a03afcc74b2fa28da7c3189fca507c:

  Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-11-06' into staging (2015-11-06 12:50:24 +0000)

are available in the git repository at:

  git://github.com/ehabkost/qemu.git tags/x86-pull-request

for you to fetch changes up to 0c47242b519a224279f13c685aa6e79347f97b85:

  target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURES (2015-11-06 12:19:33 -0200)

----------------------------------------------------------------
target-i386: tcg: Handle clflushopt/clwb/pcommit instructions

A small update to TCG code so it can handle the new
clflushopt/clwb/pcommit instructions.

----------------------------------------------------------------

Eduardo Habkost (2):
  target-i386: tcg: Accept clwb instruction
  target-i386: tcg: Check right CPUID bits for clflushopt/pcommit

Xiao Guangrong (1):
  target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURES

 target-i386/cpu.c       |  4 +++-
 target-i386/translate.c | 39 +++++++++++++++++++++++++++++++--------
 2 files changed, 34 insertions(+), 9 deletions(-)

-- 
2.1.0

[Qemu-devel] [PULL 1/3] target-i386: tcg: Accept clwb instruction

[Eduardo Habkost]

Accept the clwb instruction (66 0F AE /6) if its corresponding feature
flag is enabled on CPUID[7].

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 target-i386/translate.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index b400d24..c6d9be6 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7716,10 +7716,21 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
             }
             break;
         case 5: /* lfence */
-        case 6: /* mfence */
             if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2))
                 goto illegal_op;
             break;
+        case 6: /* mfence/clwb */
+            if (s->prefix & PREFIX_DATA) {
+                /* clwb */
+                if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB))
+                    goto illegal_op;
+                gen_nop_modrm(env, s, modrm);
+            } else {
+                /* mfence */
+                if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2))
+                    goto illegal_op;
+            }
+            break;
         case 7: /* sfence / clflush */
             if ((modrm & 0xc7) == 0xc0) {
                 /* sfence */
-- 
2.1.0

[Qemu-devel] [PULL 2/3] target-i386: tcg: Check right CPUID bits for clflushopt/pcommit

[Eduardo Habkost]

Detect the clflushopt and pcommit instructions and check their
corresponding feature flags, instead of checking CPUID_SSE and
CPUID_CLFLUSH.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 target-i386/translate.c | 28 ++++++++++++++++++++--------
 1 file changed, 20 insertions(+), 8 deletions(-)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index c6d9be6..fbe4f80 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -7731,16 +7731,28 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                     goto illegal_op;
             }
             break;
-        case 7: /* sfence / clflush */
+        case 7: /* sfence / clflush / clflushopt / pcommit */
             if ((modrm & 0xc7) == 0xc0) {
-                /* sfence */
-                /* XXX: also check for cpuid_ext2_features & CPUID_EXT2_EMMX */
-                if (!(s->cpuid_features & CPUID_SSE))
-                    goto illegal_op;
+                if (s->prefix & PREFIX_DATA) {
+                    /* pcommit */
+                    if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_PCOMMIT))
+                        goto illegal_op;
+                } else {
+                    /* sfence */
+                    /* XXX: also check for cpuid_ext2_features & CPUID_EXT2_EMMX */
+                    if (!(s->cpuid_features & CPUID_SSE))
+                        goto illegal_op;
+                }
             } else {
-                /* clflush */
-                if (!(s->cpuid_features & CPUID_CLFLUSH))
-                    goto illegal_op;
+                if (s->prefix & PREFIX_DATA) {
+                    /* clflushopt */
+                    if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLFLUSHOPT))
+                        goto illegal_op;
+                } else {
+                    /* clflush */
+                    if (!(s->cpuid_features & CPUID_CLFLUSH))
+                        goto illegal_op;
+                }
                 gen_lea_modrm(env, s, modrm);
             }
             break;
-- 
2.1.0

[Qemu-devel] [PULL 3/3] target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURES

[Eduardo Habkost]

From: Xiao Guangrong <guangrong.xiao@linux.intel.com>

Now these instructions are handled by TCG and can be added to the
TCG_7_0_EBX_FEATURES macro.

Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 target-i386/cpu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0d080c1..e5f1c5b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -345,7 +345,9 @@ static const char *cpuid_6_feature_name[] = {
 #define TCG_SVM_FEATURES 0
 #define TCG_KVM_FEATURES 0
 #define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP | \
-          CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX)
+          CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX | \
+          CPUID_7_0_EBX_PCOMMIT | CPUID_7_0_EBX_CLFLUSHOPT |            \
+          CPUID_7_0_EBX_CLWB)
           /* missing:
           CPUID_7_0_EBX_FSGSBASE, CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2,
           CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,
-- 
2.1.0

Re: [Qemu-devel] [PULL 0/3] target-i386: tcg: Handle clflushopt/clwb/pcommit instructions

[Peter Maydell]

On 7 November 2015 at 14:54, Eduardo Habkost <ehabkost@redhat.com> wrote:
> The following changes since commit 4b59f39bc9a03afcc74b2fa28da7c3189fca507c:
>
>   Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2015-11-06' into staging (2015-11-06 12:50:24 +0000)
>
> are available in the git repository at:
>
>   git://github.com/ehabkost/qemu.git tags/x86-pull-request
>
> for you to fetch changes up to 0c47242b519a224279f13c685aa6e79347f97b85:
>
>   target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURES (2015-11-06 12:19:33 -0200)
>
> ----------------------------------------------------------------
> target-i386: tcg: Handle clflushopt/clwb/pcommit instructions
>
> A small update to TCG code so it can handle the new
> clflushopt/clwb/pcommit instructions.
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM