From: Michael Davidsaver <mdavidsaver@gmail.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <crosthwaitepeter@gmail.com>,
qemu-arm@nongnu.org, Michael Davidsaver <mdavidsaver@gmail.com>
Subject: [Qemu-devel] [PATCH 09/18] armv7m: NVIC update vmstate
Date: Sun, 8 Nov 2015 20:11:36 -0500 [thread overview]
Message-ID: <1447031505-12477-10-git-send-email-mdavidsaver@gmail.com> (raw)
In-Reply-To: <1447031505-12477-1-git-send-email-mdavidsaver@gmail.com>
Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
---
hw/intc/armv7m_nvic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 62 insertions(+), 2 deletions(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 3b10dee..c860b36 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -810,15 +810,75 @@ static const MemoryRegionOps nvic_sysreg_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
+static
+int nvic_post_load(void *opaque, int version_id)
+{
+ nvic_state *s = opaque;
+ unsigned i;
+
+ /* evil hack to get ARMCPU* ahead of time */
+ assert(cpus.tqh_first);
+ assert(!CPU_NEXT(cpus.tqh_first));
+ s->cpu = ARM_CPU(cpus.tqh_first);
+ assert(s->cpu);
+
+ /* recalculate priorities */
+ for (i = 4; i < s->num_irq; i++) {
+ set_prio(s, i, s->vectors[i].raw_prio);
+ }
+
+ nvic_irq_update(s, highest_runnable_prio(s->cpu));
+
+ return 0;
+}
+
+static
+int vec_info_get(QEMUFile *f, void *pv, size_t size)
+{
+ vec_info *I = pv;
+ I->prio_sub = qemu_get_be16(f);
+ I->prio_group = qemu_get_byte(f);
+ I->raw_prio = qemu_get_ubyte(f);
+ I->enabled = qemu_get_ubyte(f);
+ I->pending = qemu_get_ubyte(f);
+ I->active = qemu_get_ubyte(f);
+ I->level = qemu_get_ubyte(f);
+ return 0;
+}
+
+static
+void vec_info_put(QEMUFile *f, void *pv, size_t size)
+{
+ vec_info *I = pv;
+ qemu_put_be16(f, I->prio_sub);
+ qemu_put_byte(f, I->prio_group);
+ qemu_put_ubyte(f, I->raw_prio);
+ qemu_put_ubyte(f, I->enabled);
+ qemu_put_ubyte(f, I->pending);
+ qemu_put_ubyte(f, I->active);
+ qemu_put_ubyte(f, I->level);
+}
+
+static const VMStateInfo vmstate_info = {
+ .name = "armv7m_nvic_info",
+ .get = vec_info_get,
+ .put = vec_info_put,
+};
+
static const VMStateDescription vmstate_nvic = {
.name = "armv7m_nvic",
- .version_id = 1,
- .minimum_version_id = 1,
+ .version_id = 2,
+ .minimum_version_id = 2,
+ .post_load = &nvic_post_load,
.fields = (VMStateField[]) {
+ VMSTATE_ARRAY(vectors, nvic_state, NVIC_MAX_VECTORS, 0,
+ vmstate_info, vec_info),
+ VMSTATE_UINT8(prigroup, nvic_state),
VMSTATE_UINT32(systick.control, nvic_state),
VMSTATE_UINT32(systick.reload, nvic_state),
VMSTATE_INT64(systick.tick, nvic_state),
VMSTATE_TIMER_PTR(systick.timer, nvic_state),
+ VMSTATE_UINT32(num_irq, nvic_state),
VMSTATE_END_OF_LIST()
}
};
--
2.1.4
next prev parent reply other threads:[~2015-11-09 1:13 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-09 1:11 [Qemu-devel] [PATCH 00/18] Fix exception handling and msr/mrs access Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 01/18] armv7m: MRS/MSR handle unprivileged access Michael Davidsaver
2015-11-17 17:09 ` Peter Maydell
2015-12-02 22:51 ` Michael Davidsaver
2015-12-02 23:04 ` Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 02/18] armv7m: Undo armv7m.hack Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 03/18] armv7m: Complain about incorrect exception table entries Michael Davidsaver
2015-11-17 17:20 ` Peter Maydell
2015-12-02 22:52 ` Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 04/18] armv7m: Explicit error for bad vector table Michael Davidsaver
2015-11-17 17:33 ` Peter Maydell
2015-12-02 22:55 ` Michael Davidsaver
2015-12-02 23:09 ` Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 05/18] armv7m: expand NVIC state Michael Davidsaver
2015-11-17 18:10 ` Peter Maydell
2015-12-02 22:58 ` Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 06/18] armv7m: new NVIC utility functions Michael Davidsaver
2015-11-20 13:25 ` Peter Maydell
2015-12-02 23:18 ` Michael Davidsaver
2015-12-03 0:11 ` Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 07/18] armv7m: Update NVIC registers Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 08/18] armv7m: fix RETTOBASE Michael Davidsaver
2015-11-09 1:11 ` Michael Davidsaver [this message]
2015-11-17 17:58 ` [Qemu-devel] [PATCH 09/18] armv7m: NVIC update vmstate Peter Maydell
2015-12-02 23:19 ` Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 10/18] armv7m: NVIC initialization Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 11/18] armv7m: fix I and F flag handling Michael Davidsaver
2015-11-20 13:47 ` Peter Maydell
2015-12-02 23:22 ` Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 12/18] armv7m: simpler/faster exception start Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 13/18] armv7m: implement CFSR and HFSR Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 14/18] armv7m: auto-clear FAULTMASK Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 15/18] arm: gic: Remove references to NVIC Michael Davidsaver
2015-11-17 18:00 ` Peter Maydell
2015-11-09 1:11 ` [Qemu-devel] [PATCH 16/18] armv7m: check exception return consistency Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 17/18] armv7m: implement CCR Michael Davidsaver
2015-11-09 1:11 ` [Qemu-devel] [PATCH 18/18] armv7m: prevent unprivileged write to STIR Michael Davidsaver
2015-11-17 17:07 ` [Qemu-devel] [PATCH 00/18] Fix exception handling and msr/mrs access Peter Maydell
2015-11-20 13:59 ` Peter Maydell
2015-12-02 22:48 ` Michael Davidsaver
2015-12-17 19:36 ` Peter Maydell
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