[Qemu-devel] [PATCH 08/18] armv7m: fix RETTOBASE

[Michael Davidsaver <mdavidsaver@gmail.com>]

The polarity is reversed, and it should include
internal exceptions.

Should be set when # of active exceptions <= 1.

Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
---
 hw/intc/armv7m_nvic.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 30e349e..3b10dee 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -432,16 +432,20 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
         val = cpu->env.v7m.exception;
         /* VECTPENDING */
         val |= (cpu->env.v7m.pending << 12)&0x1ff;
-        /* ISRPENDING and RETTOBASE */
+        /* ISRPENDING - Set it any externel IRQ pending (vector>=16) */
         for (irq = 16; irq < s->num_irq; irq++) {
             if (s->vectors[irq].pending) {
                 val |= (1 << 22);
                 break;
             }
+        }
+        /* RETTOBASE - Set if no (other) handler is active */
+        for (irq = 1; irq < s->num_irq; irq++) {
             if (irq != cpu->env.v7m.exception && s->vectors[irq].active) {
-                val |= (1 << 11);
+                val |= (1 << 11); /* some other handler is active */
             }
         }
+        val ^= (1<<11); /* invert */
         /* PENDSTSET */
         if (s->vectors[ARMV7M_EXCP_SYSTICK].pending) {
             val |= (1 << 26);
@@ -454,6 +458,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
         if (s->vectors[ARMV7M_EXCP_NMI].pending) {
             val |= (1 << 31);
         }
+        /* ISRPREEMPT not implemented */
         return val;
     case 0xd08: /* Vector Table Offset.  */
         return cpu->env.v7m.vecbase;
@@ -588,10 +593,14 @@ static void nvic_writel(nvic_state *s, uint32_t offset, uint32_t value)
                 qemu_irq_pulse(s->sysresetreq);
             }
             if (value & 2) {
-                qemu_log_mask(LOG_UNIMP, "VECTCLRACTIVE unimplemented\n");
+                qemu_log_mask(LOG_GUEST_ERROR,
+                              "Setting VECTCLRACTIVE when not in DEBUG mode "
+                              "is UNPREDICTABLE\n");
             }
             if (value & 1) {
-                qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
+                qemu_log_mask(LOG_GUEST_ERROR,
+                              "Setting VECTRESET when not in DEBUG mode "
+                              "is UNPREDICTABLE\n");
             }
             if (value & 0x700) {
                 unsigned i;
-- 
2.1.4