From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38606) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwJJx-0004CV-JZ for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:30 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwJJw-0004yG-P1 for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:29 -0500 From: Benjamin Herrenschmidt Date: Wed, 11 Nov 2015 11:28:10 +1100 Message-Id: <1447201710-10229-58-git-send-email-benh@kernel.crashing.org> In-Reply-To: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> References: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> Subject: [Qemu-devel] [PATCH 57/77] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org The architecture specifies that any instruction that sets MSR:PR will also set MSR:EE, IR and DR. Signed-off-by: Benjamin Herrenschmidt --- target-ppc/helper_regs.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h index 12af61c..09bc450 100644 --- a/target-ppc/helper_regs.h +++ b/target-ppc/helper_regs.h @@ -136,6 +136,10 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, /* Change the exception prefix on PowerPC 601 */ env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000; } + /* If PR=1 then EE, IR and DR must be 1 */ + if ((value >> MSR_PR) & 1) { + value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR); + } #endif env->msr = value; hreg_compute_hflags(env); -- 2.5.0