From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwJKL-00050A-Dx for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwJKK-00057y-MA for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:53 -0500 From: Benjamin Herrenschmidt Date: Wed, 11 Nov 2015 11:28:21 +1100 Message-Id: <1447201710-10229-69-git-send-email-benh@kernel.crashing.org> In-Reply-To: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> References: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> Subject: [Qemu-devel] [PATCH 68/77] ppc: Add dummy POWER8 MPPR register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org Controls the micropartition prefetch, this is pretty much meaningless in full emulation (used for priming the caches on real HW). Signed-off-by: Benjamin Herrenschmidt --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 13 +++++++++++++ 2 files changed, 14 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index f7e653b..253d04b 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1399,6 +1399,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_DHDES (0x0B1) #define SPR_DPDES (0x0B0) #define SPR_DAWR (0x0B4) +#define SPR_MPPR (0x0B8) #define SPR_RPR (0x0BA) #define SPR_DAWRX (0x0BC) #define SPR_HFSCR (0x0BE) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 4ad2c94..a178696 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8212,6 +8212,18 @@ static void gen_spr_power8_ic(CPUPPCState *env) #endif } +static void gen_spr_power8_book4(CPUPPCState *env) +{ + /* Add a number of P8 book4 registers */ +#if !defined(CONFIG_USER_ONLY) + spr_register_hv(env, SPR_MPPR, "MPPR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0); +#endif +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -8266,6 +8278,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_rpr(env); gen_spr_power8_dbell(env); gen_spr_power8_ic(env); + gen_spr_power8_book4(env); } if (version < BOOK3S_CPU_POWER8) { gen_spr_book3s_dbg(env); -- 2.5.0