From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39053) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwJKO-00055z-IJ for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwJKN-000590-MP for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:56 -0500 From: Benjamin Herrenschmidt Date: Wed, 11 Nov 2015 11:28:22 +1100 Message-Id: <1447201710-10229-70-git-send-email-benh@kernel.crashing.org> In-Reply-To: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> References: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> Subject: [Qemu-devel] [PATCH 69/77] ppc: Add dummy POWER8 PSPB SPR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org On real hardware it allows temporary thread priority boosts, we don't do threads and implementing it would be fairly tricky, so we just dummy it or now. Signed-off-by: Benjamin Herrenschmidt --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 253d04b..334fcfe 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1396,6 +1396,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_UAMOR (0x09D) #define SPR_MPC_ICTRL (0x09E) #define SPR_MPC_BAR (0x09F) +#define SPR_PSPB (0x09F) #define SPR_DHDES (0x0B1) #define SPR_DPDES (0x0B0) #define SPR_DAWR (0x0B4) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index a178696..b1eba73 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8224,6 +8224,16 @@ static void gen_spr_power8_book4(CPUPPCState *env) #endif } +static void gen_spr_power8_pspb(CPUPPCState *env) +{ +#if !defined(CONFIG_USER_ONLY) + spr_register(env, SPR_PSPB, "PSPB", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0); +#endif +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -8278,6 +8288,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_rpr(env); gen_spr_power8_dbell(env); gen_spr_power8_ic(env); + gen_spr_power8_pspb(env); gen_spr_power8_book4(env); } if (version < BOOK3S_CPU_POWER8) { -- 2.5.0