From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58075) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwjeT-0000bg-Bo for qemu-devel@nongnu.org; Wed, 11 Nov 2015 23:38:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwjeJ-0001GS-Ql for qemu-devel@nongnu.org; Wed, 11 Nov 2015 23:38:25 -0500 From: David Gibson Date: Thu, 12 Nov 2015 15:38:37 +1100 Message-Id: <1447303123-4446-10-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1447303123-4446-1-git-send-email-david@gibson.dropbear.id.au> References: <1447303123-4446-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 08/14] cuda.c: fix CUDA SR interrupt clearing List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, aik@ozlabs.ru, Mark Cave-Ayland , agraf@suse.de, mdroth@linux.vnet.ibm.com, qemu-ppc@nongnu.org, David Gibson From: Mark Cave-Ayland Make sure that we also clear the data and clock interrupts at the same time. Signed-off-by: Mark Cave-Ayland Signed-off-by: David Gibson --- hw/misc/macio/cuda.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index b7e9dee..364473f 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -57,6 +57,8 @@ #define IER_SET 0x80 /* set bits in IER */ #define IER_CLR 0 /* clear bits in IER */ #define SR_INT 0x04 /* Shift register full/empty */ +#define SR_DATA_INT 0x08 +#define SR_CLOCK_INT 0x10 #define T1_INT 0x40 /* Timer 1 interrupt */ #define T2_INT 0x20 /* Timer 2 interrupt */ @@ -261,7 +263,7 @@ static uint32_t cuda_readb(void *opaque, hwaddr addr) break; case 10: val = s->sr; - s->ifr &= ~SR_INT; + s->ifr &= ~(SR_INT | SR_CLOCK_INT | SR_DATA_INT); cuda_update_irq(s); break; case 11: -- 2.5.0