From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58006) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwjeP-0000bW-I0 for qemu-devel@nongnu.org; Wed, 11 Nov 2015 23:38:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwjeI-0001Ec-5d for qemu-devel@nongnu.org; Wed, 11 Nov 2015 23:38:21 -0500 From: David Gibson Date: Thu, 12 Nov 2015 15:38:30 +1100 Message-Id: <1447303123-4446-3-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1447303123-4446-1-git-send-email-david@gibson.dropbear.id.au> References: <1447303123-4446-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 01/14] PPC: Allow Rc bit to be set on mtspr List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: lvivier@redhat.com, thuth@redhat.com, qemu-devel@nongnu.org, aik@ozlabs.ru, Mark Cave-Ayland , agraf@suse.de, mdroth@linux.vnet.ibm.com, qemu-ppc@nongnu.org, David Gibson From: Alexander Graf According to the ISA setting the Rc bit on mtspr is undefined behavior. Real 750 hardware simply ignores the bit and doesn't touch cr0 though. Unfortunately, Mac OS 9 relies on this fact and executes a few mtspr instructions (to set XER for example) with Rc set. So let's handle the bit the same way hardware does and ignore it. Signed-off-by: Alexander Graf Signed-off-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: David Gibson Signed-off-by: David Gibson --- target-ppc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 308ad68..41a7258 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -9884,7 +9884,7 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC), GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B), #endif GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC), -GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC), +GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000000, PPC_MISC), GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE), GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE), GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE), -- 2.5.0