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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org, qemu-arm@nongnu.org,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH v2 01/19] exec.c: Don't set cpu->as until cpu_address_space_init
Date: Mon, 16 Nov 2015 14:05:05 +0000	[thread overview]
Message-ID: <1447682723-3977-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1447682723-3977-1-git-send-email-peter.maydell@linaro.org>

Rather than setting cpu->as unconditionally in cpu_exec_init
(and then having target-i386 override this later), don't set
it until the first call to cpu_address_space_init.

This requires us to initialise the address space for
both TCG and KVM (KVM doesn't need the AS listener but
it does require cpu->as to be set).

For target CPUs which don't set up any address spaces (currently
everything except i386), add the default address_space_memory
in qemu_init_vcpu().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 cpus.c                  | 10 ++++++++--
 exec.c                  | 16 ++++++++++++----
 include/exec/exec-all.h | 16 +++++++++++++++-
 target-i386/cpu.c       |  6 ++++--
 4 files changed, 39 insertions(+), 9 deletions(-)

diff --git a/cpus.c b/cpus.c
index 877bd70..b347e42 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1310,8 +1310,6 @@ static void qemu_tcg_init_vcpu(CPUState *cpu)
     static QemuCond *tcg_halt_cond;
     static QemuThread *tcg_cpu_thread;
 
-    tcg_cpu_address_space_init(cpu, cpu->as);
-
     /* share a single thread for all cpus with TCG */
     if (!tcg_cpu_thread) {
         cpu->thread = g_malloc0(sizeof(QemuThread));
@@ -1372,6 +1370,14 @@ void qemu_init_vcpu(CPUState *cpu)
     cpu->nr_cores = smp_cores;
     cpu->nr_threads = smp_threads;
     cpu->stopped = true;
+
+    if (!cpu->as) {
+        /* If the target cpu hasn't set up any address spaces itself,
+         * give it the default one.
+         */
+        cpu_address_space_init(cpu, &address_space_memory, 0);
+    }
+
     if (kvm_enabled()) {
         qemu_kvm_start_vcpu(cpu);
     } else if (tcg_enabled()) {
diff --git a/exec.c b/exec.c
index b09f18b..1313fad 100644
--- a/exec.c
+++ b/exec.c
@@ -551,8 +551,13 @@ CPUState *qemu_get_cpu(int index)
 }
 
 #if !defined(CONFIG_USER_ONLY)
-void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
+void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx)
 {
+    if (asidx == 0) {
+        /* address space 0 gets the convenience alias */
+        cpu->as = as;
+    }
+
     /* We only support one address space per cpu at the moment.  */
     assert(cpu->as == as);
 
@@ -564,8 +569,10 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
     cpu->cpu_ases = g_new0(CPUAddressSpace, 1);
     cpu->cpu_ases[0].cpu = cpu;
     cpu->cpu_ases[0].as = as;
-    cpu->cpu_ases[0].tcg_as_listener.commit = tcg_commit;
-    memory_listener_register(&cpu->cpu_ases[0].tcg_as_listener, as);
+    if (tcg_enabled()) {
+        cpu->cpu_ases[0].tcg_as_listener.commit = tcg_commit;
+        memory_listener_register(&cpu->cpu_ases[0].tcg_as_listener, as);
+    }
 }
 #endif
 
@@ -620,8 +627,9 @@ void cpu_exec_init(CPUState *cpu, Error **errp)
     int cpu_index;
     Error *local_err = NULL;
 
+    cpu->as = NULL;
+
 #ifndef CONFIG_USER_ONLY
-    cpu->as = &address_space_memory;
     cpu->thread_id = qemu_get_thread_id();
 #endif
 
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index d900b0d..eb3890a 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -84,7 +84,21 @@ void QEMU_NORETURN cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc);
 
 #if !defined(CONFIG_USER_ONLY)
 void cpu_reloading_memory_map(void);
-void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as);
+/**
+ * cpu_address_space_init:
+ * @cpu: CPU to add this address space to
+ * @as: address space to add
+ * @asidx: integer index of this address space
+ *
+ * Add the specified address space to the CPU's cpu_ases list.
+ * The address space added with @asidx 0 is the one used for the
+ * convenience pointer cpu->as.
+ * The target-specific code which registers ASes is responsible
+ * for defining what semantics address space 0, 1, 2, etc have.
+ *
+ * Note that with KVM only one address space is supported.
+ */
+void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx);
 /* cputlb.c */
 /**
  * tlb_flush_page:
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index e5f1c5b..9cf9f02 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2857,9 +2857,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
 
 #ifndef CONFIG_USER_ONLY
     if (tcg_enabled()) {
+        AddressSpace *newas = g_new(AddressSpace, 1);
+
         cpu->cpu_as_mem = g_new(MemoryRegion, 1);
         cpu->cpu_as_root = g_new(MemoryRegion, 1);
-        cs->as = g_new(AddressSpace, 1);
 
         /* Outer container... */
         memory_region_init(cpu->cpu_as_root, OBJECT(cpu), "memory", ~0ull);
@@ -2872,7 +2873,8 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
                                  get_system_memory(), 0, ~0ull);
         memory_region_add_subregion_overlap(cpu->cpu_as_root, 0, cpu->cpu_as_mem, 0);
         memory_region_set_enabled(cpu->cpu_as_mem, true);
-        address_space_init(cs->as, cpu->cpu_as_root, "CPU");
+        address_space_init(newas, cpu->cpu_as_root, "CPU");
+        cpu_address_space_init(cs, newas, 0);
 
         /* ... SMRAM with higher priority, linked from /machine/smram.  */
         cpu->machine_done.notify = x86_cpu_machine_done;
-- 
1.9.1

  reply	other threads:[~2015-11-16 14:05 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-16 14:05 [Qemu-devel] [PATCH v2 00/19] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2015-11-16 14:05 ` Peter Maydell [this message]
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 02/19] exec.c: Allow target CPUs to define multiple AddressSpaces Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 03/19] exec-all.h: Document tlb_set_page_with_attrs, tlb_set_page Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 04/19] include/qom/cpu.h: Add new get_phys_page_attrs_debug method Peter Maydell
2015-11-16 14:07   ` Andreas Färber
2015-11-16 14:22     ` Andreas Färber
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 05/19] include/qom/cpu.h: Add new asidx_from_attrs method Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 06/19] cputlb.c: Use correct address space when looking up MemoryRegionSection Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 08/19] exec.c: Add cpu_get_address_space() Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 09/19] exec.c: Use cpu_get_phys_page_attrs_debug Peter Maydell
2016-01-11 13:47   ` Paolo Bonzini
2016-01-11 14:18     ` Peter Maydell
2016-01-11 14:59       ` Paolo Bonzini
2016-01-11 15:04         ` Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 10/19] exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_write Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 11/19] memory: Add address_space_init_shareable() Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 12/19] qom/cpu: Add MemoryRegion property Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 13/19] target-arm: Add QOM property for Secure memory region Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 14/19] target-arm: Implement asidx_from_attrs Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 15/19] target-arm: Implement cpu_get_phys_page_attrs_debug Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 16/19] target-arm: Support multiple address spaces in page table walks Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 17/19] hw/arm/virt: Wire up memory region to CPUs explicitly Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 18/19] [RFC] hw/arm/virt: add secure memory region and UART Peter Maydell
2015-12-08 16:55   ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2015-11-16 14:05 ` [Qemu-devel] [PATCH v2 19/19] HACK: rearrange the virt memory map to suit OP-TEE Peter Maydell
2015-12-15 16:26 ` [Qemu-devel] [PATCH v2 00/19] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2016-01-11 13:04   ` Peter Maydell
2016-01-12 13:56     ` Edgar E. Iglesias

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