From: Sergey Fedorov <serge.fdrv@gmail.com>
To: qemu-devel@nongnu.org
Cc: Sergey Fedorov <serge.fdrv@gmail.com>,
qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Subject: [Qemu-devel] [PATCH 1/2] target-arm: Update condexec before CP access check in AA32 translation
Date: Mon, 16 Nov 2015 22:34:38 +0300 [thread overview]
Message-ID: <1447702479-6997-2-git-send-email-serge.fdrv@gmail.com> (raw)
In-Reply-To: <1447702479-6997-1-git-send-email-serge.fdrv@gmail.com>
Coprocessor access instructions are allowed inside IT block.
gen_helper_access_check_cp_reg() can raise an exceptions thus condexec
bits should be updated before.
Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
---
target-arm/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 4351854..f1f8129 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7210,6 +7210,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
break;
}
+ gen_set_condexec(dc);
gen_set_pc_im(s, s->pc - 4);
tmpptr = tcg_const_ptr(ri);
tcg_syn = tcg_const_i32(syndrome);
--
1.9.1
next prev parent reply other threads:[~2015-11-16 19:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-16 19:34 [Qemu-devel] [PATCH 0/2] target-arm: Missed gen_set_condexec() in AA32 translation Sergey Fedorov
2015-11-16 19:34 ` Sergey Fedorov [this message]
2015-11-17 10:59 ` [Qemu-devel] [PATCH 1/2] target-arm: Update condexec before CP access check " Sergey Fedorov
2015-11-17 13:31 ` Peter Maydell
2015-11-17 13:38 ` Sergey Fedorov
2015-11-16 19:34 ` [Qemu-devel] [PATCH 2/2] target-arm: Update condexec before arch BP " Sergey Fedorov
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