From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60757) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZyPYD-000627-U8 for qemu-devel@nongnu.org; Mon, 16 Nov 2015 14:34:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZyPYD-0001OB-0J for qemu-devel@nongnu.org; Mon, 16 Nov 2015 14:34:53 -0500 From: Sergey Fedorov Date: Mon, 16 Nov 2015 22:34:38 +0300 Message-Id: <1447702479-6997-2-git-send-email-serge.fdrv@gmail.com> In-Reply-To: <1447702479-6997-1-git-send-email-serge.fdrv@gmail.com> References: <1447702479-6997-1-git-send-email-serge.fdrv@gmail.com> Subject: [Qemu-devel] [PATCH 1/2] target-arm: Update condexec before CP access check in AA32 translation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Sergey Fedorov , qemu-arm@nongnu.org, Peter Maydell Coprocessor access instructions are allowed inside IT block. gen_helper_access_check_cp_reg() can raise an exceptions thus condexec bits should be updated before. Signed-off-by: Sergey Fedorov --- target-arm/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target-arm/translate.c b/target-arm/translate.c index 4351854..f1f8129 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7210,6 +7210,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn) break; } + gen_set_condexec(dc); gen_set_pc_im(s, s->pc - 4); tmpptr = tcg_const_ptr(ri); tcg_syn = tcg_const_i32(syndrome); -- 1.9.1