From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52214) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZysMP-0008Sd-PK for qemu-devel@nongnu.org; Tue, 17 Nov 2015 21:20:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZysML-0002NX-Fg for qemu-devel@nongnu.org; Tue, 17 Nov 2015 21:20:37 -0500 Received: from mga02.intel.com ([134.134.136.20]:5101) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZysML-0002Mp-9b for qemu-devel@nongnu.org; Tue, 17 Nov 2015 21:20:33 -0500 From: Huaitong Han Date: Wed, 18 Nov 2015 10:20:16 +0800 Message-Id: <1447813217-10532-3-git-send-email-huaitong.han@intel.com> In-Reply-To: <1447813217-10532-1-git-send-email-huaitong.han@intel.com> References: <1447813217-10532-1-git-send-email-huaitong.han@intel.com> Subject: [Qemu-devel] [PATCH v3 2/3] target-i386: add pkeys support for xsave state handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: pbonzini@redhat.com, rth@twiddle.net, afaerber@suse.de, ehabkost@redhat.com Cc: Huaitong Han , qemu-devel@nongnu.org, kvm@vger.kernel.org This patch adds pkeys support for xsave state handling. Signed-off-by: Huaitong Han diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 3c11e02..456cb3b 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -487,6 +487,8 @@ static const ExtSaveArea ext_save_areas[] = { .offset = 0x480, .size = 0x200 }, [7] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, .offset = 0x680, .size = 0x400 }, + [9] = { .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU, + .offset = 0xA80, .size = 0x8 }, }; const char *get_register_name_32(unsigned int reg) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index c2e7501..2230b3e 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -401,6 +401,7 @@ #define XSTATE_OPMASK (1ULL << 5) #define XSTATE_ZMM_Hi256 (1ULL << 6) #define XSTATE_Hi16_ZMM (1ULL << 7) +#define XSTATE_PKRU (1ULL << 9) /* CPUID feature words */ @@ -984,6 +985,8 @@ typedef struct CPUX86State { uint64_t xcr0; uint64_t xss; + uint32_t pkru; + TPRAccess tpr_access_type; } CPUX86State; diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 066d03d..16a8eff 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -1092,6 +1092,7 @@ static int kvm_put_fpu(X86CPU *cpu) #define XSAVE_OPMASK 272 #define XSAVE_ZMM_Hi256 288 #define XSAVE_Hi16_ZMM 416 +#define XSAVE_PKRU 672 static int kvm_put_xsave(X86CPU *cpu) { @@ -1145,6 +1146,7 @@ static int kvm_put_xsave(X86CPU *cpu) #ifdef TARGET_X86_64 memcpy(&xsave->region[XSAVE_Hi16_ZMM], &env->xmm_regs[16], 16 * sizeof env->xmm_regs[16]); + memcpy(&xsave->region[XSAVE_PKRU], &env->pkru, sizeof env->pkru); #endif r = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XSAVE, xsave); return r; @@ -1516,6 +1518,7 @@ static int kvm_get_xsave(X86CPU *cpu) #ifdef TARGET_X86_64 memcpy(&env->xmm_regs[16], &xsave->region[XSAVE_Hi16_ZMM], 16 * sizeof env->xmm_regs[16]); + memcpy(&env->pkru, &xsave->region[XSAVE_PKRU], sizeof env->pkru); #endif return 0; } -- 2.4.3