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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Thu, 19 Nov 2015 21:23:58 +1100
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Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 09/77] ppc: Fix do_rfi() for rfi
	emulation
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To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org

On Thu, 2015-11-19 at 17:19 +1100, David Gibson wrote:
> On Wed, Nov 11, 2015 at 11:27:22AM +1100, Benjamin Herrenschmidt
> wrote:
> > XXX This patch needs double checking... It fixed 32-bit userspace
> > but I'm not sure it's right. I wonder whether msr_is_64bit() should
> > be applied to env->msr, not msr, but I need to double check the
> > architecture.
>=20
> Hrm, I'm not really sure where I'd look in the arch, but
> msr_is_64bit(env->msr) seems like it would make more sense to me.
> The current logic means that rfi, ostensibly a 32-bit instruction
> will
> have different behaviour depending on the upper bits of SRR1, which
> seems a unexpected.

I only just discovered that rfi is actually gone from arch 2.07 :-)

I'll dig a bit more tomorrow.

Cheers,
Ben.

>=20
> >=20
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > ---
> > =C2=A0target-ppc/excp_helper.c | 4 ++--
> > =C2=A01 file changed, 2 insertions(+), 2 deletions(-)
> >=20
> > diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
> > index c1d6605..00fae60 100644
> > --- a/target-ppc/excp_helper.c
> > +++ b/target-ppc/excp_helper.c
> > @@ -878,13 +878,13 @@ static inline void do_rfi(CPUPPCState *env,
> > target_ulong nip, target_ulong msr,
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0CPUState *cs =3D CPU(ppc_env_get_cpu(en=
v));
> > =C2=A0
> > =C2=A0#if defined(TARGET_PPC64)
> > +=C2=A0=C2=A0=C2=A0=C2=A0msr =3D msr & msrm;
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (msr_is_64bit(env, msr)) {
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0nip =3D (uint64=
_t)nip;
> > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0msr &=3D (uint64_t)m=
srm;
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} else {
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0nip =3D (uint32=
_t)nip;
> > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0msr =3D (uint32_t)(m=
sr & msrm);
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (keep_msrh) =
{
> > +	=C2=A0=C2=A0=C2=A0=C2=A0msr &=3D 0xffffffff;
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0msr |=3D env->msr & ~((uint64_t)0xFFFFFFFF);
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0}
> > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0}
>=20