From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51337) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZzZaa-00027b-J3 for qemu-devel@nongnu.org; Thu, 19 Nov 2015 19:30:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZzZaW-0005vD-Iz for qemu-devel@nongnu.org; Thu, 19 Nov 2015 19:30:08 -0500 Message-ID: <1447979388.11126.33.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Fri, 20 Nov 2015 11:29:48 +1100 In-Reply-To: <20151116051621.GF2747@voom.fritz.box> References: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> <1447201710-10229-9-git-send-email-benh@kernel.crashing.org> <20151116051621.GF2747@voom.fritz.box> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 08/77] ppc: Add number of threads per core to the processor definition List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On Mon, 2015-11-16 at 16:16 +1100, David Gibson wrote: > On Wed, Nov 11, 2015 at 11:27:21AM +1100, Benjamin Herrenschmidt > wrote: > > Also use it to clamp the max SMT mode and ensure that the cpu_dt_id > > are offset by that value in order to preserve consistency with the > > HW implementations. > >=20 > > Signed-off-by: Benjamin Herrenschmidt >=20 > Reviewed-by: David Gibson In fact this is broken ;-) All the CPUs without thread get 0 in the new field which trips at init time since we can create 0 threads :-) It broke for example 32-bit stuff. I've fixed that in github. > > --- > > =C2=A0target-ppc/cpu-qom.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0| 1 + > > =C2=A0target-ppc/translate_init.c | 8 +++++++- > > =C2=A02 files changed, 8 insertions(+), 1 deletion(-) > >=20 > > diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h > > index 6967a80..fef23fd 100644 > > --- a/target-ppc/cpu-qom.h > > +++ b/target-ppc/cpu-qom.h > > @@ -68,6 +68,7 @@ typedef struct PowerPCCPUClass { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint32_t flags; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0int bfd_mach; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint32_t l1_dcache_size, l1_icache_size= ; > > +=C2=A0=C2=A0=C2=A0=C2=A0uint32_t threads_per_core; > > =C2=A0#if defined(TARGET_PPC64) > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0const struct ppc_segment_page_sizes *sp= s; > > =C2=A0#endif > > diff --git a/target-ppc/translate_init.c b/target- > > ppc/translate_init.c > > index c743eb1..1d402e1 100644 > > --- a/target-ppc/translate_init.c > > +++ b/target-ppc/translate_init.c > > @@ -8193,6 +8193,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void > > *data) > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0POWERPC_FLAG_BUS_CLK; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->l1_dcache_size =3D 0x8000; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->l1_icache_size =3D 0x10000; > > +=C2=A0=C2=A0=C2=A0=C2=A0pcc->threads_per_core =3D 2; > > =C2=A0} > > =C2=A0 > > =C2=A0static void powerpc_get_compat(Object *obj, Visitor *v, > > @@ -8339,6 +8340,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void > > *data) > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->l1_dcache_size =3D 0x8000; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->l1_icache_size =3D 0x8000; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->interrupts_big_endian =3D > > ppc_cpu_interrupts_big_endian_lpcr; > > +=C2=A0=C2=A0=C2=A0=C2=A0pcc->threads_per_core =3D 4; > > =C2=A0} > > =C2=A0 > > =C2=A0static void init_proc_POWER8(CPUPPCState *env) > > @@ -8419,6 +8421,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void > > *data) > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->l1_dcache_size =3D 0x8000; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->l1_icache_size =3D 0x8000; > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pcc->interrupts_big_endian =3D > > ppc_cpu_interrupts_big_endian_lpcr; > > +=C2=A0=C2=A0=C2=A0=C2=A0pcc->threads_per_core =3D 8; > > =C2=A0} > > =C2=A0#endif /* defined (TARGET_PPC64) */ > > =C2=A0 > > @@ -9074,6 +9077,9 @@ static void ppc_cpu_realizefn(DeviceState > > *dev, Error **errp) > > =C2=A0#endif > > =C2=A0 > > =C2=A0#if !defined(CONFIG_USER_ONLY) > > +=C2=A0=C2=A0=C2=A0=C2=A0if (max_smt > pcc->threads_per_core) { > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0max_smt =3D pcc->thr= eads_per_core; > > +=C2=A0=C2=A0=C2=A0=C2=A0} > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (smp_threads > max_smt) { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0error_setg(errp= , "Cannot support more than %d threads on > > PPC with %s", > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0max_smt, kvm_enabled()= ? "KVM" : "TCG"); > > @@ -9094,7 +9100,7 @@ static void ppc_cpu_realizefn(DeviceState > > *dev, Error **errp) > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} > > =C2=A0 > > =C2=A0#if !defined(CONFIG_USER_ONLY) > > -=C2=A0=C2=A0=C2=A0=C2=A0cpu->cpu_dt_id =3D (cs->cpu_index / smp_thre= ads) * max_smt > > +=C2=A0=C2=A0=C2=A0=C2=A0cpu->cpu_dt_id =3D (cs->cpu_index / smp_thre= ads) * pcc- > > >threads_per_core > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0+ (cs->cpu_inde= x % smp_threads); > > =C2=A0#endif > > =C2=A0 >=20