From: Michael Davidsaver <mdavidsaver@gmail.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <crosthwaitepeter@gmail.com>,
qemu-arm@nongnu.org, Michael Davidsaver <mdavidsaver@gmail.com>
Subject: [Qemu-devel] [PATCH v2 06/26] armv7m: fix I and F flag handling
Date: Wed, 2 Dec 2015 19:18:33 -0500 [thread overview]
Message-ID: <1449101933-24928-7-git-send-email-mdavidsaver@gmail.com> (raw)
In-Reply-To: <1449101933-24928-1-git-send-email-mdavidsaver@gmail.com>
Despite having the same notation, these bits
have completely different meaning than -AR.
Use armv7m_excp_running_prio() and the highest
pending exception priority to determine
if the pending exception can interrupt preempt.
---
target-arm/cpu.c | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 5348028..6e3b251 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -305,19 +305,15 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
ARMCPU *cpu = ARM_CPU(cs);
- CPUARMState *env = &cpu->env;
bool ret = false;
-
- if (interrupt_request & CPU_INTERRUPT_FIQ
- && !(env->daif & PSTATE_F)) {
- cs->exception_index = EXCP_FIQ;
- cc->do_interrupt(cs);
- ret = true;
- }
+ /* ARMv7-M interrupt masking works differently than -A or -R.
+ * There is no FIQ/IRQ distinction.
+ * Instead of masking interrupt sources, the I and F bits
+ * (along with basepri) mask certain exception priority levels.
+ */
if (interrupt_request & CPU_INTERRUPT_HARD
- && !(env->daif & PSTATE_I)
- ) {
+ && (armv7m_excp_running_prio(cpu) > cpu->env.v7m.pending_prio)) {
cs->exception_index = EXCP_IRQ;
cc->do_interrupt(cs);
ret = true;
--
2.1.4
next prev parent reply other threads:[~2015-12-03 0:19 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-03 0:18 [Qemu-devel] [PATCH v2 00/26] armv7m: exception handling, MPU, and more Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 01/26] armv7m: MRS/MSR handle unprivileged access Michael Davidsaver
2015-12-17 13:10 ` Peter Maydell
2017-01-12 14:14 ` Peter Maydell
2017-01-12 16:33 ` Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 02/26] armv7m: Undo armv7m.hack Michael Davidsaver
2015-12-17 15:38 ` Peter Maydell
2015-12-27 20:22 ` Michael Davidsaver
2015-12-28 18:36 ` Peter Maydell
2015-12-28 1:55 ` Michael Davidsaver
2015-12-28 18:27 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 03/26] armv7m: Explicit error for bad vector table Michael Davidsaver
2015-12-17 13:25 ` Peter Maydell
2015-12-27 20:43 ` Michael Davidsaver
2015-12-28 18:38 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 04/26] armv7m: additional cpu state for exception handling Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 05/26] armv7m: add armv7m_excp_running_prio() Michael Davidsaver
2015-12-17 14:36 ` Peter Maydell
2015-12-27 20:56 ` Michael Davidsaver
2015-12-28 18:41 ` Peter Maydell
2015-12-03 0:18 ` Michael Davidsaver [this message]
2015-12-17 14:39 ` [Qemu-devel] [PATCH v2 06/26] armv7m: fix I and F flag handling Peter Maydell
2015-12-17 15:18 ` Peter Maydell
2015-12-28 1:59 ` Michael Davidsaver
2015-12-28 18:43 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 07/26] armv7m: simpler/faster exception start Michael Davidsaver
2015-12-17 15:39 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 08/26] armv7m: rewrite NVIC Michael Davidsaver
2015-12-17 18:49 ` Peter Maydell
2015-12-19 19:08 ` Christopher Friedt
2015-12-19 19:45 ` Christopher Friedt
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 09/26] armv7m: implement CFSR, HFSR, BFAR, and MMFAR Michael Davidsaver
2015-12-17 19:04 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 10/26] armv7m: auto-clear FAULTMASK Michael Davidsaver
2015-12-17 19:07 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 11/26] arm: gic: Remove references to NVIC Michael Davidsaver
2015-12-17 19:08 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 12/26] armv7m: check exception return consistency Michael Davidsaver
2015-12-17 19:26 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 13/26] armv7m: implement CCR Michael Davidsaver
2015-12-17 19:31 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 14/26] armv7m: prevent unprivileged write to STIR Michael Davidsaver
2015-12-17 19:33 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 15/26] armv7m: add MPU to cortex-m3 and cortex-m4 Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 16/26] armv7m: add some mpu debugging prints Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 17/26] armv7m: mpu background miss is perm fault Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 18/26] armv7m: update base region policy Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 19/26] armv7m: mpu not allowed to map exception return codes Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 20/26] armv7m: observable initial register state Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 21/26] armv7m: CONTROL<1> handling Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 22/26] armv7m: priority field mask Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 23/26] qom: add cpu_generic_init_unrealized() Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 24/26] armv7m: split armv7m_init in two parts Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 25/26] armv7m: remove extra cpu_reset() Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 26/26] armv7m: decide whether faults are MemManage or BusFault Michael Davidsaver
2015-12-17 19:38 ` [Qemu-devel] [PATCH v2 00/26] armv7m: exception handling, MPU, and more Peter Maydell
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