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Mon, 28 Jul 2025 12:34:14 -0700 (PDT) Received: from [192.168.1.87] ([38.41.223.211]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23fbe4fd224sm59861305ad.82.2025.07.28.12.34.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 28 Jul 2025 12:34:14 -0700 (PDT) Message-ID: <144f0930-af30-42b0-849c-99242d3f09ee@linaro.org> Date: Mon, 28 Jul 2025 12:34:13 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/3] single-binary: compile hw/intc/arm* files once Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Peter Maydell References: <20250725201906.19533-1-pierrick.bouvier@linaro.org> From: Pierrick Bouvier In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/28/25 2:39 AM, Philippe Mathieu-Daudé wrote: > On 25/7/25 22:19, Pierrick Bouvier wrote: >> Move those files to hw/arm, as they depend on arm target code. >> >> Pierrick Bouvier (3): >> hw/arm/arm_gicv3_cpuif_common: move to hw/arm and compile only once >> hw/arm/arm_gicv3_cpuif: move to hw/arm and compile only once >> hw/arm/armv7m_nvic: move to hw/arm and compile only once >> >> hw/{intc => arm}/arm_gicv3_cpuif.c | 2 +- >> hw/{intc => arm}/arm_gicv3_cpuif_common.c | 2 +- >> hw/{intc => arm}/armv7m_nvic.c | 0 > > Alternatively add arm_common_ss in hw/intc/meson.build? > > arm_common_ss = ss.source_set() > arm_common_ss.add(when: 'CONFIG_ARM_GIC', > if_true: files('arm_gicv3_cpuif_common.c')) > arm_common_ss.add(when: 'CONFIG_ARM_GICV3', > if_true: files('arm_gicv3_cpuif.c')) > arm_common_ss.add(when: 'CONFIG_ARM_V7M', > if_true: files('armv7m_nvic.c')) > hw_common_arch += {'arm': arm_common_ss} > The problem with this approach is that we need to aggregate hw/arm and hw/intc arm related source sets, and the last line in your proposed change does not have this semantic. Regarding meson, hw/intc subfolder is parsed *before* hw/arm (see hw/meson.build), so we can't reuse the same source set, defined in hw/arm/meson.build. This old commit (7702e47c2) was the origin of having interrupt related code in a generic folder, but I don't really understand the rationale behind it to be honest. It seems to be an exception regarding all the rest of the codebase, thus the idea to bring back things where they belong. I'm open to any other idea someone would have. Peter, without necessarily a working solution, do you have any preference on where those things should be? >> hw/arm/meson.build | 3 + >> hw/arm/trace-events | 79 +++++++++++++++++++++++ >> hw/intc/meson.build | 3 - >> hw/intc/trace-events | 79 ----------------------- >> 7 files changed, 84 insertions(+), 84 deletions(-) >> rename hw/{intc => arm}/arm_gicv3_cpuif.c (99%) >> rename hw/{intc => arm}/arm_gicv3_cpuif_common.c (92%) >> rename hw/{intc => arm}/armv7m_nvic.c (100%) >> >