From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a8MkD-0003gH-DV for qemu-devel@nongnu.org; Mon, 14 Dec 2015 01:36:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a8MkA-0000ra-6C for qemu-devel@nongnu.org; Mon, 14 Dec 2015 01:36:25 -0500 Received: from mail-io0-x230.google.com ([2607:f8b0:4001:c06::230]:34565) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a8MkA-0000rV-1a for qemu-devel@nongnu.org; Mon, 14 Dec 2015 01:36:22 -0500 Received: by ioae126 with SMTP id e126so33851002ioa.1 for ; Sun, 13 Dec 2015 22:36:21 -0800 (PST) From: Christopher Friedt Date: Mon, 14 Dec 2015 01:36:09 -0500 Message-Id: <1450074970-28562-1-git-send-email-chrisfriedt@gmail.com> Subject: [Qemu-devel] [RFC] qemu-system-arm: cortex-m gdb registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Christopher Friedt At least for Cortex-M3 devices (but also M0, M0+, M4, ...), while JTAG debugging using OpenOCD's built-in GDB server, the general purpose register layout (i.e. `info reg' in GDB) should contain slightly more than the usual ARM core registers. The non-addressable core registers that appear in OpenOCD's listing are: r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, sp (r13), lr (r14), pc (r15), xpsr, primask, basepri, faultmask, and control. These registers are well documented in the ARMv7M Architecture Reference Manual. This change addes preliminary support for those registers via a custom qXfer:features:read+ and XML response that follows the GNU convention documented here [1] for org.gnu.gdb.arm.m-profile and org.gnu.gdb.arm.m-system. [1] https://goo.gl/NMxlC5 The default behaviour for non-cortex-m will be to mimic the original ARM behaviour of referring the GDB client to an . A simple test environment for this patch is to compile and link the following assembly fragment: .syntax unified .cpu cortex-m3 .section .interp .word 0x20020000 .word 0x9 .text .global _start .thumb .thumb_func .type _start, %function _start: b _start .size _start, .-_start Using the command below: arm-none-eabi-gcc -g -O0 -mthumb -march=armv7-m -Wl,-Ttext-segment,0 \ -static -nostartfiles -o foo foo.S Launch the resulting binary with qemu: qemu-system-arm -S -s -M netduino2 -nographic -kernel foo Run gdb, attaching to the qemu's GDB server: arm-none-eabi-gdb foo (gdb) target remote localhost:1234 Remote debugging using localhost:1234 0x00000000 in _start () (gdb) info all-registers r0 0x0 0 r1 0x0 0 r2 0x0 0 r3 0x0 0 r4 0x0 0 r5 0x0 0 r6 0x0 0 r7 0x0 0 r8 0x0 0 r9 0x0 0 r10 0x0 0 r11 0x0 0 r12 0x0 0 sp 0xbffef7fc 0xbffef7fc lr 0x0 0 pc 0x0 0x0 <_start> xpsr 0x40000000 1073741824 msp 0xbffef7fc 0xbffef7fc psp 0x0 0x0 <_start> primask 0x0 0 basepri 0x0 0 faultmask 0x1 1 control 0x0 0 The changes have been tested with other firmware images and also via Eclipse Mars. Christopher Friedt (1): qemu-system-arm: cortex-m gdb registers gdbstub.c | 29 ++++--- include/qom/cpu.h | 1 + target-arm/cpu-qom.h | 4 + target-arm/cpu.c | 5 +- target-arm/gdbstub.c | 215 +++++++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 241 insertions(+), 13 deletions(-) -- 2.5.4 (Apple Git-61)