From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53101) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9e5t-0004Mv-Cj for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:20:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a9e5o-0006WE-Bn for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:20:04 -0500 Received: from mail-qg0-x22c.google.com ([2607:f8b0:400d:c04::22c]:34740) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9e5o-0006W8-7T for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:20:00 -0500 Received: by mail-qg0-x22c.google.com with SMTP id p88so241163qge.1 for ; Thu, 17 Dec 2015 11:20:00 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 17 Dec 2015 11:19:18 -0800 Message-Id: <1450379966-28198-3-git-send-email-rth@twiddle.net> In-Reply-To: <1450379966-28198-1-git-send-email-rth@twiddle.net> References: <1450379966-28198-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 02/10] target-i386: Introduce mo_stacksize List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, aurelien@aurel32.net, peter.maydell@linaro.org Centralize computation of a MO_SIZE for the stack pointer. Signed-off-by: Richard Henderson --- target-i386/translate.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 3cc17f7..e0df5c0 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -307,6 +307,12 @@ static inline TCGMemOp mo_pushpop(DisasContext *s, TCGMemOp ot) } } +/* Select the size of the stack pointer. */ +static inline TCGMemOp mo_stacksize(DisasContext *s) +{ + return CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16; +} + /* Select only size 64 else 32. Used for SSE operand sizes. */ static inline TCGMemOp mo_64_32(TCGMemOp ot) { @@ -2292,31 +2298,22 @@ gen_svm_check_intercept(DisasContext *s, target_ulong pc_start, uint64_t type) static inline void gen_stack_update(DisasContext *s, int addend) { -#ifdef TARGET_X86_64 - if (CODE64(s)) { - gen_op_add_reg_im(MO_64, R_ESP, addend); - } else -#endif - if (s->ss32) { - gen_op_add_reg_im(MO_32, R_ESP, addend); - } else { - gen_op_add_reg_im(MO_16, R_ESP, addend); - } + gen_op_add_reg_im(mo_stacksize(s), R_ESP, addend); } /* Generate a push. It depends on ss32, addseg and dflag. */ static void gen_push_v(DisasContext *s, TCGv val) { - TCGMemOp a_ot, d_ot = mo_pushpop(s, s->dflag); + TCGMemOp d_ot = mo_pushpop(s, s->dflag); + TCGMemOp a_ot = mo_stacksize(s); int size = 1 << d_ot; TCGv new_esp = cpu_A0; tcg_gen_subi_tl(cpu_A0, cpu_regs[R_ESP], size); if (CODE64(s)) { - a_ot = MO_64; + /* No special handling. */ } else if (s->ss32) { - a_ot = MO_32; if (s->addseg) { new_esp = cpu_tmp4; tcg_gen_mov_tl(new_esp, cpu_A0); @@ -2325,7 +2322,6 @@ static void gen_push_v(DisasContext *s, TCGv val) tcg_gen_ext32u_tl(cpu_A0, cpu_A0); } } else { - a_ot = MO_16; new_esp = cpu_tmp4; tcg_gen_ext16u_tl(cpu_A0, cpu_A0); tcg_gen_mov_tl(new_esp, cpu_A0); -- 2.5.0