From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9e8j-0000Pf-Cy for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:23:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a9e8f-0007ND-Bo for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:23:01 -0500 Received: from mail-ob0-x236.google.com ([2607:f8b0:4003:c01::236]:35961) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9e8f-0007N9-8F for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:22:57 -0500 Received: by mail-ob0-x236.google.com with SMTP id no2so64054413obc.3 for ; Thu, 17 Dec 2015 11:22:57 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 17 Dec 2015 11:22:51 -0800 Message-Id: <1450380172-2906-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 09/10] target-i386: Tidy gen_add_A0_im List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, aurelien@aurel32.net, peter.maydell@linaro.org Merge gen_op_addl_A0_im and gen_op_addq_A0_im into gen_add_A0_im and clean up the ifdef. Replace the one remaining user of gen_op_addl_A0_im with gen_add_A0_im. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/translate.c | 27 +++++---------------------- 1 file changed, 5 insertions(+), 22 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 2be4ba8..8059bbc 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -376,29 +376,12 @@ static inline void gen_op_mov_v_reg(TCGMemOp ot, TCGv t0, int reg) } } -static inline void gen_op_addl_A0_im(int32_t val) -{ - tcg_gen_addi_tl(cpu_A0, cpu_A0, val); -#ifdef TARGET_X86_64 - tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff); -#endif -} - -#ifdef TARGET_X86_64 -static inline void gen_op_addq_A0_im(int64_t val) -{ - tcg_gen_addi_tl(cpu_A0, cpu_A0, val); -} -#endif - static void gen_add_A0_im(DisasContext *s, int val) { -#ifdef TARGET_X86_64 - if (CODE64(s)) - gen_op_addq_A0_im(val); - else -#endif - gen_op_addl_A0_im(val); + tcg_gen_addi_tl(cpu_A0, cpu_A0, val); + if (!CODE64(s)) { + tcg_gen_ext32u_tl(cpu_A0, cpu_A0); + } } static inline void gen_op_jmp_v(TCGv dest) @@ -6232,7 +6215,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, exception */ gen_op_jmp_v(cpu_T[0]); /* pop selector */ - gen_op_addl_A0_im(1 << dflag); + gen_add_A0_im(s, 1 << dflag); gen_op_ld_v(s, dflag, cpu_T[0], cpu_A0); gen_op_movl_seg_T0_vm(R_CS); /* add stack offset */ -- 2.5.0