From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34561) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9efU-0002fl-NW for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:56:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a9efQ-0007Pj-Jz for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:56:52 -0500 Received: from mail-ob0-x22d.google.com ([2607:f8b0:4003:c01::22d]:36825) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9efQ-0007PP-FS for qemu-devel@nongnu.org; Thu, 17 Dec 2015 14:56:48 -0500 Received: by mail-ob0-x22d.google.com with SMTP id no2so64697723obc.3 for ; Thu, 17 Dec 2015 11:56:48 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 17 Dec 2015 11:56:32 -0800 Message-Id: <1450382206-5149-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 00/14] tcg: Improve sparc register windows List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk, aurelien@aurel32.net This is a two year old patch set that I revived just before the 2.5 cutoff; I decided against re-posting it then, but now that 2.6 development is open, I think it's time to try again. The Idea is to let TCG know that the 24 windowed registers are accessed via a different base register than TCG_AREG0. Moreover, the base register by which they are accessed is itself loaded via TCG_AREG0. A simple bit of recursion in the tcg register allocation functions that allows this to happen. We were able to do some benchmarking with this patch set during the summer and fall; it's somewhere on the mailing list if you want to go looking. r~ Richard Henderson (14): tcg: Change tcg_global_mem_new_* to take a TCGv_ptr tcg: Change ts->mem_reg to ts->mem_base tcg: Tidy temporary allocation tcg: More use of TCGReg where appropriate tcg: Remove tcg_get_arg_str_i32/64 tcg: Change reg_to_temp to TCGTemp pointer tcg: Change temp_dead argument to TCGTemp tcg: Change temp_sync argument to TCGTemp tcg: Change temp_save argument to TCGTemp tcg: Introduce temp_load tcg: Implement indirect memory registers tcg: Allocate indirect_base temporaries in a different order target-sparc: Tidy global register initialization target-sparc: Use global registers for the register window target-alpha/translate.c | 8 +- target-arm/translate-a64.c | 6 +- target-arm/translate.c | 18 +- target-cris/translate.c | 24 +- target-cris/translate_v10.c | 82 +++--- target-i386/translate.c | 10 +- target-lm32/translate.c | 24 +- target-m68k/translate.c | 30 +- target-microblaze/translate.c | 18 +- target-mips/translate.c | 25 +- target-moxie/translate.c | 8 +- target-openrisc/translate.c | 26 +- target-ppc/translate.c | 44 +-- target-s390x/translate.c | 18 +- target-sh4/translate.c | 48 ++-- target-sparc/translate.c | 192 ++++++------- target-tilegx/translate.c | 4 +- target-tricore/translate.c | 22 +- target-unicore32/translate.c | 2 +- target-xtensa/translate.c | 10 +- tcg/tcg.c | 639 +++++++++++++++++++++--------------------- tcg/tcg.h | 51 ++-- 22 files changed, 670 insertions(+), 639 deletions(-) -- 2.5.0