From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35795) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9ejB-0006lF-8C for qemu-devel@nongnu.org; Thu, 17 Dec 2015 15:00:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a9ejA-0000K6-0d for qemu-devel@nongnu.org; Thu, 17 Dec 2015 15:00:40 -0500 Received: from mail-oi0-x235.google.com ([2607:f8b0:4003:c06::235]:34007) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9ej9-0000Jx-Gy for qemu-devel@nongnu.org; Thu, 17 Dec 2015 15:00:39 -0500 Received: by mail-oi0-x235.google.com with SMTP id o124so48736596oia.1 for ; Thu, 17 Dec 2015 12:00:39 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 17 Dec 2015 12:00:37 -0800 Message-Id: <1450382437-6157-1-git-send-email-rth@twiddle.net> In-Reply-To: <1450382320-5383-1-git-send-email-rth@twiddle.net> References: <1450382320-5383-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 14/14] target-sparc: Use global registers for the register window List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk, aurelien@aurel32.net Via indirection off cpu_regwptr. Signed-off-by: Richard Henderson --- target-sparc/translate.c | 49 ++++++++++++++++++++++++++---------------------- 1 file changed, 27 insertions(+), 22 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index c13a9d3..c818a36 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -46,7 +46,8 @@ static TCGv_ptr cpu_env, cpu_regwptr; static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst; static TCGv_i32 cpu_cc_op; static TCGv_i32 cpu_psr; -static TCGv cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8]; +static TCGv cpu_fsr, cpu_pc, cpu_npc; +static TCGv cpu_regs[32]; static TCGv cpu_y; #ifndef CONFIG_USER_ONLY static TCGv cpu_tbr; @@ -276,36 +277,31 @@ static inline void gen_address_mask(DisasContext *dc, TCGv addr) static inline TCGv gen_load_gpr(DisasContext *dc, int reg) { - if (reg == 0 || reg >= 8) { + if (reg > 0) { + assert(reg < 32); + return cpu_regs[reg]; + } else { TCGv t = get_temp_tl(dc); - if (reg == 0) { - tcg_gen_movi_tl(t, 0); - } else { - tcg_gen_ld_tl(t, cpu_regwptr, (reg - 8) * sizeof(target_ulong)); - } + tcg_gen_movi_tl(t, 0); return t; - } else { - return cpu_gregs[reg]; } } static inline void gen_store_gpr(DisasContext *dc, int reg, TCGv v) { if (reg > 0) { - if (reg < 8) { - tcg_gen_mov_tl(cpu_gregs[reg], v); - } else { - tcg_gen_st_tl(v, cpu_regwptr, (reg - 8) * sizeof(target_ulong)); - } + assert(reg < 32); + tcg_gen_mov_tl(cpu_regs[reg], v); } } static inline TCGv gen_dest_gpr(DisasContext *dc, int reg) { - if (reg == 0 || reg >= 8) { - return get_temp_tl(dc); + if (reg > 0) { + assert(reg < 32); + return cpu_regs[reg]; } else { - return cpu_gregs[reg]; + return get_temp_tl(dc); } } @@ -5321,8 +5317,11 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb) void gen_intermediate_code_init(CPUSPARCState *env) { static int inited; - static const char gregnames[8][4] = { + static const char gregnames[32][4] = { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", + "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7", + "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", + "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7", }; static const char fregnames[32][4] = { "f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14", @@ -5392,11 +5391,17 @@ void gen_intermediate_code_init(CPUSPARCState *env) *rtl[i].ptr = tcg_global_mem_new(cpu_env, rtl[i].off, rtl[i].name); } - TCGV_UNUSED(cpu_gregs[0]); + TCGV_UNUSED(cpu_regs[0]); for (i = 1; i < 8; ++i) { - cpu_gregs[i] = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, gregs[i]), - gregnames[i]); + cpu_regs[i] = tcg_global_mem_new(cpu_env, + offsetof(CPUSPARCState, gregs[i]), + gregnames[i]); + } + + for (i = 8; i < 32; ++i) { + cpu_regs[i] = tcg_global_mem_new(cpu_regwptr, + (i - 8) * sizeof(target_ulong), + gregnames[i]); } for (i = 0; i < TARGET_DPREGS; i++) { -- 2.5.0