From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk, aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 15/25] target-sparc: Introduce gen_check_align
Date: Thu, 17 Dec 2015 12:57:05 -0800 [thread overview]
Message-ID: <1450385825-2450-1-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1450385695-1940-1-git-send-email-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-sparc/translate.c | 48 +++++++++++++-----------------------------------
1 file changed, 13 insertions(+), 35 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 18e249b..01559bd 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1049,6 +1049,13 @@ static void gen_exception(DisasContext *dc, int which)
dc->is_br = 1;
}
+static void gen_check_align(TCGv addr, int mask)
+{
+ TCGv_i32 r_mask = tcg_const_i32(mask);
+ gen_helper_check_align(cpu_env, addr, r_mask);
+ tcg_temp_free_i32(r_mask);
+}
+
static inline void gen_mov_pc_npc(DisasContext *dc)
{
if (dc->npc == JUMP_PC) {
@@ -4684,8 +4691,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
#endif
#ifdef TARGET_SPARC64
} else if (xop == 0x39) { /* V9 return */
- TCGv_i32 r_const;
-
save_state(dc);
cpu_src1 = get_src1(dc, insn);
cpu_tmp0 = get_temp_tl(dc);
@@ -4703,9 +4708,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
}
gen_helper_restore(cpu_env);
gen_mov_pc_npc(dc);
- r_const = tcg_const_i32(3);
- gen_helper_check_align(cpu_env, cpu_tmp0, r_const);
- tcg_temp_free_i32(r_const);
+ gen_check_align(cpu_tmp0, 3);
tcg_gen_mov_tl(cpu_npc, cpu_tmp0);
dc->npc = DYNAMIC_PC;
goto jmp_insn;
@@ -4728,16 +4731,12 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
switch (xop) {
case 0x38: /* jmpl */
{
- TCGv t;
- TCGv_i32 r_const;
-
- t = gen_dest_gpr(dc, rd);
+ TCGv t = gen_dest_gpr(dc, rd);
tcg_gen_movi_tl(t, dc->pc);
gen_store_gpr(dc, rd, t);
+
gen_mov_pc_npc(dc);
- r_const = tcg_const_i32(3);
- gen_helper_check_align(cpu_env, cpu_tmp0, r_const);
- tcg_temp_free_i32(r_const);
+ gen_check_align(cpu_tmp0, 3);
gen_address_mask(dc, cpu_tmp0);
tcg_gen_mov_tl(cpu_npc, cpu_tmp0);
dc->npc = DYNAMIC_PC;
@@ -4746,14 +4745,10 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
#if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64)
case 0x39: /* rett, V9 return */
{
- TCGv_i32 r_const;
-
if (!supervisor(dc))
goto priv_insn;
gen_mov_pc_npc(dc);
- r_const = tcg_const_i32(3);
- gen_helper_check_align(cpu_env, cpu_tmp0, r_const);
- tcg_temp_free_i32(r_const);
+ gen_check_align(cpu_tmp0, 3);
tcg_gen_mov_tl(cpu_npc, cpu_tmp0);
dc->npc = DYNAMIC_PC;
gen_helper_rett(cpu_env);
@@ -4849,14 +4844,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
if (rd & 1)
goto illegal_insn;
else {
- TCGv_i32 r_const;
TCGv_i64 t64;
- save_state(dc);
- r_const = tcg_const_i32(7);
- /* XXX remove alignment check */
- gen_helper_check_align(cpu_env, cpu_addr, r_const);
- tcg_temp_free_i32(r_const);
gen_address_mask(dc, cpu_addr);
t64 = tcg_temp_new_i64();
tcg_gen_qemu_ld64(t64, cpu_addr, dc->mem_idx);
@@ -5064,18 +5053,11 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
if (rd & 1)
goto illegal_insn;
else {
- TCGv_i32 r_const;
TCGv_i64 t64;
TCGv lo;
- save_state(dc);
gen_address_mask(dc, cpu_addr);
- r_const = tcg_const_i32(7);
- /* XXX remove alignment check */
- gen_helper_check_align(cpu_env, cpu_addr, r_const);
- tcg_temp_free_i32(r_const);
lo = gen_load_gpr(dc, rd + 1);
-
t64 = tcg_temp_new_i64();
tcg_gen_concat_tl_i64(t64, lo, cpu_val);
tcg_gen_qemu_st64(t64, cpu_addr, dc->mem_idx);
@@ -5188,15 +5170,11 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
break;
case 0x36: /* V9 stqfa */
{
- TCGv_i32 r_const;
-
CHECK_FPU_FEATURE(dc, FLOAT128);
if (gen_trap_ifnofpu(dc)) {
goto jmp_insn;
}
- r_const = tcg_const_i32(7);
- gen_helper_check_align(cpu_env, cpu_addr, r_const);
- tcg_temp_free_i32(r_const);
+ gen_check_align(cpu_addr, 7);
gen_stf_asi(dc, cpu_addr, insn, 16, QFPREG(rd));
}
break;
--
2.5.0
next prev parent reply other threads:[~2015-12-17 20:57 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-17 20:54 [Qemu-devel] [PATCH 00/25] target-sparc improvements Richard Henderson
2015-12-17 20:54 ` [Qemu-devel] [PATCH 01/25] target-sparc: Mark more flags for helpers Richard Henderson
2015-12-17 20:54 ` [Qemu-devel] [PATCH 02/25] target-sparc: Remove softint as a TCG global Richard Henderson
2015-12-17 20:54 ` [Qemu-devel] [PATCH 03/25] target-sparc: Store mmu index in TB flags Richard Henderson
2015-12-17 20:54 ` [Qemu-devel] [PATCH 04/25] target-sparc: Create gen_exception Richard Henderson
2015-12-17 20:56 ` [Qemu-devel] [PATCH 10/25] target-sparc: Add UA2011 defines to asi.h Richard Henderson
2016-01-12 13:17 ` Artyom Tarasenko
2015-12-17 20:57 ` [Qemu-devel] [PATCH 12/25] target-sparc: Add MMU_REAL_IDX Richard Henderson
2016-01-11 11:15 ` Artyom Tarasenko
2016-01-11 12:01 ` Artyom Tarasenko
2015-12-17 20:57 ` [Qemu-devel] [PATCH 14/25] target-sparc: Use QT0 to return results from ldda Richard Henderson
2015-12-17 20:57 ` Richard Henderson [this message]
2015-12-17 20:57 ` [Qemu-devel] [PATCH 17/25] target-sparc: Fix obvious error in ASI_M_BFILL Richard Henderson
2015-12-17 20:57 ` [Qemu-devel] [PATCH 19/25] target-sparc: Directly implement easy ldf/stf asis Richard Henderson
2015-12-17 20:57 ` [Qemu-devel] [PATCH 20/25] target-sparc: Directly implement block and short " Richard Henderson
2015-12-17 20:57 ` [Qemu-devel] [PATCH 21/25] target-sparc: Remove helper_ldf_asi, helper_stf_asi Richard Henderson
2015-12-17 20:57 ` [Qemu-devel] [PATCH 23/25] target-sparc: Use cpu_fsr in stfsr Richard Henderson
2015-12-17 20:57 ` [Qemu-devel] [PATCH 24/25] target-sparc: Use cpu_loop_exit_restore from helper_check_ieee_exceptions Richard Henderson
2015-12-17 20:57 ` [Qemu-devel] [PATCH 25/25] target-sparc: Elide duplicate updates to fprs Richard Henderson
2015-12-17 23:11 ` [Qemu-devel] [PATCH 06/25] target-sparc: Store %asi in TB flags Richard Henderson
2015-12-17 23:11 ` [Qemu-devel] [PATCH 08/25] target-sparc: Pass TCGMemOp to gen_ld/st_asi Richard Henderson
2015-12-17 23:13 ` [Qemu-devel] [PATCH 00/25] target-sparc improvements Richard Henderson
2015-12-29 18:59 ` Mark Cave-Ayland
2016-01-08 15:08 ` Richard Henderson
2016-01-15 20:44 ` Artyom Tarasenko
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