[Qemu-devel] [PATCH v4 0/7] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests

[James Hogan <james.hogan@imgtec.com>]

Here's a v4 refresh of my FPU/MSA patchset for v2.6. Thanks to all who
have taken the time to review it so far.

This patchset primarily adds support for FPU and MIPS SIMD Architecture
(MSA) in MIPS KVM guests to QEMU. It depends on Linux v4.1, specifically
my KVM patchset to add the corresponding hypervisor support to KVM
("[PATCH 00/20] MIPS: KVM: Guest FPU & SIMD (MSA) support").

All comments welcome.

Changes in v4:
- Rebase on master (dropped patch 1 & 2).

Changes in v3 (patch 6 only):
- Fix big endian (the pointer passed to the kernel must be for the
  actual 32-bit value, not a temporary 64-bit value, otherwise on big
  endian systems the kernel will only interpret the upper half).

Changes in v2:
- Moved most of patch 7 and updates to linux-headers/linux/kvm.h from
  patches 8 and 9 into a new patch 1, which is purely for reference
  (Paolo).
- Add the changes to MIPS_CP0_{32,64} macros from v1 patch 7 to patch 2,
  since the rest of that patch is now unnecessary and the change is
  along the same lines as patch 2 (not added Leon's Reviewed-by to this
  patch due to that non-reviewed change).
- Fix line wrapping of kvm_mips_get_one_reg() calls from Config4 and
  Config5 in patch 5 (Leon).
- Change (1 << x) to (1U << x) in important places in patch 5, 8 & 9 to
  avoid compiler undefined behaviour (Leon).

James Hogan (7):
  mips/kvm: Remove a couple of noisy DPRINTFs
  mips/kvm: Implement PRid CP0 register
  mips/kvm: Implement Config CP0 registers
  mips/kvm: Support unsigned KVM registers
  mips/kvm: Support signed 64-bit KVM registers
  mips/kvm: Support FPU in MIPS KVM guests
  mips/kvm: Support MSA in MIPS KVM guests

 target-mips/kvm.c | 388 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 375 insertions(+), 13 deletions(-)

-- 
2.4.10