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From: James Hogan <james.hogan@imgtec.com>
To: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>
Cc: James Hogan <james.hogan@imgtec.com>,
	Leon Alrae <leon.alrae@imgtec.com>,
	Aurelien Jarno <aurelien@aurel32.net>,
	kvm@vger.kernel.org
Subject: [Qemu-devel] [PATCH v4 1/7] mips/kvm: Remove a couple of noisy DPRINTFs
Date: Fri, 18 Dec 2015 10:45:58 +0000	[thread overview]
Message-ID: <1450435564-30720-2-git-send-email-james.hogan@imgtec.com> (raw)
In-Reply-To: <1450435564-30720-1-git-send-email-james.hogan@imgtec.com>

The DPRINTFs in cpu_mips_io_interrupts_pending() and kvm_arch_pre_run()
are particularly noisy during normal execution, and also not
particularly helpful. Remove them so that more important debug messages
can be more easily seen.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
---
 target-mips/kvm.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 12d7db311ece..5cd65ad201ca 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -88,7 +88,6 @@ static inline int cpu_mips_io_interrupts_pending(MIPSCPU *cpu)
 {
     CPUMIPSState *env = &cpu->env;
 
-    DPRINTF("%s: %#x\n", __func__, env->CP0_Cause & (1 << (2 + CP0Ca_IP)));
     return env->CP0_Cause & (0x1 << (2 + CP0Ca_IP));
 }
 
@@ -117,7 +116,6 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 
 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 {
-    DPRINTF("%s\n", __func__);
     return MEMTXATTRS_UNSPECIFIED;
 }
 
-- 
2.4.10

  reply	other threads:[~2015-12-18 10:46 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-18 10:45 [Qemu-devel] [PATCH v4 0/7] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests James Hogan
2015-12-18 10:45 ` James Hogan [this message]
2015-12-18 10:45 ` [Qemu-devel] [PATCH v4 2/7] mips/kvm: Implement PRid CP0 register James Hogan
2015-12-18 10:46 ` [Qemu-devel] [PATCH v4 3/7] mips/kvm: Implement Config CP0 registers James Hogan
2015-12-18 10:46 ` [Qemu-devel] [PATCH v4 4/7] mips/kvm: Support unsigned KVM registers James Hogan
2015-12-18 10:46 ` [Qemu-devel] [PATCH v4 5/7] mips/kvm: Support signed 64-bit " James Hogan
2015-12-18 10:46 ` [Qemu-devel] [PATCH v4 6/7] mips/kvm: Support FPU in MIPS KVM guests James Hogan
2015-12-18 10:46 ` [Qemu-devel] [PATCH v4 7/7] mips/kvm: Support MSA " James Hogan
2016-02-02  9:58   ` Leon Alrae
2016-02-02 12:39     ` James Hogan
2016-02-02 13:56       ` Leon Alrae

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