From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51768) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aB9Fc-0003Yl-A4 for qemu-devel@nongnu.org; Mon, 21 Dec 2015 17:48:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aB9FY-0005WO-5C for qemu-devel@nongnu.org; Mon, 21 Dec 2015 17:48:20 -0500 Received: from mail-by2on0110.outbound.protection.outlook.com ([207.46.100.110]:13696 helo=na01-by2-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aB9FX-0005Vq-Uk for qemu-devel@nongnu.org; Mon, 21 Dec 2015 17:48:16 -0500 From: Andrew Baumann Date: Mon, 21 Dec 2015 14:47:49 -0800 Message-ID: <1450738069-18664-4-git-send-email-Andrew.Baumann@microsoft.com> In-Reply-To: <1450738069-18664-1-git-send-email-Andrew.Baumann@microsoft.com> References: <1450738069-18664-1-git-send-email-Andrew.Baumann@microsoft.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH v3 3/3] sdhci: add optional quirk property to disable card insertion/removal interrupts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Igor Mitsyanko , Andrew Baumann , Sai Pavan Boddu , Peter Crosthwaite , Stefan Hajnoczi This is needed for a quirk of the Raspberry Pi (bcm2835/6) MMC controller, where the card insert bit is documented as unimplemented (always reads zero, doesn't generate interrupts) but is in fact observed on hardware as set at power on, but is cleared (and remains clear) on subsequent controller resets. Signed-off-by: Andrew Baumann Reviewed-by: Peter Crosthwaite --- Notes: v3: add missing field in header, drop needless change to vmstate hw/sd/sdhci.c | 5 ++++- include/hw/sd/sdhci.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index dd83e89..7acb4d7 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -193,7 +193,9 @@ static void sdhci_reset(SDHCIState *s) * initialization */ memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad); - sd_set_cb(s->card, s->ro_cb, s->eject_cb); + if (!s->noeject_quirk) { + sd_set_cb(s->card, s->ro_cb, s->eject_cb); + } s->data_count = 0; s->stopped_state = sdhc_not_stopped; } @@ -1276,6 +1278,7 @@ static Property sdhci_sysbus_properties[] = { DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, SDHC_CAPAB_REG_DEFAULT), DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0), + DEFINE_PROP_BOOL("noeject-quirk", SDHCIState, noeject_quirk, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index e78d938..ffd1f80 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -77,6 +77,7 @@ typedef struct SDHCIState { uint32_t buf_maxsz; uint16_t data_count; /* current element in FIFO buffer */ uint8_t stopped_state;/* Current SDHC state */ + bool noeject_quirk;/* Quirk to disable card insert/remove interrupts */ /* Buffer Data Port Register - virtual access point to R and W buffers */ /* Software Reset Register - always reads as 0 */ /* Force Event Auto CMD12 Error Interrupt Reg - write only */ -- 2.5.3