From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49375) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aHUT1-0004Hj-Hg for qemu-devel@nongnu.org; Fri, 08 Jan 2016 05:40:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aHUSy-0000tC-Um for qemu-devel@nongnu.org; Fri, 08 Jan 2016 05:40:23 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50461) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aHUSy-0000sk-N7 for qemu-devel@nongnu.org; Fri, 08 Jan 2016 05:40:20 -0500 From: Gerd Hoffmann Date: Fri, 8 Jan 2016 11:40:09 +0100 Message-Id: <1452249615-8222-2-git-send-email-kraxel@redhat.com> In-Reply-To: <1452249615-8222-1-git-send-email-kraxel@redhat.com> References: <1452249615-8222-1-git-send-email-kraxel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 1/7] ohci: split reset method in 3 parts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Gerd Hoffmann From: Herv=C3=A9 Poussineau The three parts are: - root hub reset (ohci_roothub_reset) - host controller soft reset (ohci_soft_reset) - host controller hard reset (ohci_hard_reset) Signed-off-by: Herv=C3=A9 Poussineau Tested-by: Mark Cave-Ayland Message-id: 1450567431-31795-2-git-send-email-hpoussin@reactos.org Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-ohci.c | 66 ++++++++++++++++++++++++++++++++-----------------= ------ 1 file changed, 38 insertions(+), 28 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 7d65818..0661804 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -439,15 +439,37 @@ static void ohci_stop_endpoints(OHCIState *ohci) } } =20 +static void ohci_roothub_reset(OHCIState *ohci) +{ + OHCIPort *port; + int i; + + ohci_bus_stop(ohci); + ohci->rhdesc_a =3D OHCI_RHA_NPS | ohci->num_ports; + ohci->rhdesc_b =3D 0x0; /* Impl. specific */ + ohci->rhstatus =3D 0; + + for (i =3D 0; i < ohci->num_ports; i++) { + port =3D &ohci->rhport[i]; + port->ctrl =3D 0; + if (port->port.dev && port->port.dev->attached) { + usb_port_reset(&port->port); + } + } + if (ohci->async_td) { + usb_cancel_packet(&ohci->usb_packet); + ohci->async_td =3D 0; + } + ohci_stop_endpoints(ohci); +} + /* Reset the controller */ -static void ohci_reset(void *opaque) +static void ohci_soft_reset(OHCIState *ohci) { - OHCIState *ohci =3D opaque; - OHCIPort *port; - int i; + trace_usb_ohci_reset(ohci->name); =20 ohci_bus_stop(ohci); - ohci->ctl =3D 0; + ohci->ctl =3D (ohci->ctl & OHCI_CTL_IR) | OHCI_USB_SUSPEND; ohci->old_ctl =3D 0; ohci->status =3D 0; ohci->intr_status =3D 0; @@ -470,25 +492,13 @@ static void ohci_reset(void *opaque) ohci->frame_number =3D 0; ohci->pstart =3D 0; ohci->lst =3D OHCI_LS_THRESH; +} =20 - ohci->rhdesc_a =3D OHCI_RHA_NPS | ohci->num_ports; - ohci->rhdesc_b =3D 0x0; /* Impl. specific */ - ohci->rhstatus =3D 0; - - for (i =3D 0; i < ohci->num_ports; i++) - { - port =3D &ohci->rhport[i]; - port->ctrl =3D 0; - if (port->port.dev && port->port.dev->attached) { - usb_port_reset(&port->port); - } - } - if (ohci->async_td) { - usb_cancel_packet(&ohci->usb_packet); - ohci->async_td =3D 0; - } - ohci_stop_endpoints(ohci); - trace_usb_ohci_reset(ohci->name); +static void ohci_hard_reset(OHCIState *ohci) +{ + ohci_soft_reset(ohci); + ohci->ctl =3D 0; + ohci_roothub_reset(ohci); } =20 /* Get an array of dwords from main memory */ @@ -1441,7 +1451,7 @@ static void ohci_set_ctl(OHCIState *ohci, uint32_t = val) trace_usb_ohci_resume(ohci->name); break; case OHCI_USB_RESET: - ohci_reset(ohci); + ohci_hard_reset(ohci); break; } } @@ -1704,7 +1714,7 @@ static void ohci_mem_write(void *opaque, ohci->status |=3D val; =20 if (ohci->status & OHCI_STATUS_HCR) - ohci_reset(ohci); + ohci_hard_reset(ohci); break; =20 case 3: /* HcInterruptStatus */ @@ -1783,7 +1793,7 @@ static void ohci_mem_write(void *opaque, case 25: /* HcHReset */ ohci->hreset =3D val & ~OHCI_HRESET_FSBIR; if (val & OHCI_HRESET_FSBIR) - ohci_reset(ohci); + ohci_hard_reset(ohci); break; =20 case 26: /* HcHInterruptEnable */ @@ -1960,7 +1970,7 @@ static void usb_ohci_reset_pci(DeviceState *d) OHCIPCIState *ohci =3D PCI_OHCI(dev); OHCIState *s =3D &ohci->state; =20 - ohci_reset(s); + ohci_hard_reset(s); } =20 #define TYPE_SYSBUS_OHCI "sysbus-ohci" @@ -1993,7 +2003,7 @@ static void usb_ohci_reset_sysbus(DeviceState *dev) OHCISysBusState *s =3D SYSBUS_OHCI(dev); OHCIState *ohci =3D &s->ohci; =20 - ohci_reset(ohci); + ohci_hard_reset(ohci); } =20 static Property ohci_pci_properties[] =3D { --=20 1.8.3.1