* [Qemu-devel] [PULL v2 0/4] target-arm queue
@ 2016-01-11 16:09 Peter Maydell
2016-01-11 16:33 ` Peter Maydell
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2016-01-11 16:09 UTC (permalink / raw)
To: qemu-devel
v2, dropping the xlnx high ram regions patch.
-- PMM
The following changes since commit ac0d9dbf33608d0b178e0bd414ec7397ada17834:
Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160111' into staging (2016-01-11 14:22:04 +0000)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160111-1
for you to fetch changes up to fea9b3ca9cc4685f89e0b929a61e51098fbb4f49:
hw/arm/virt: Support legacy -nic command line syntax (2016-01-11 16:04:50 +0000)
----------------------------------------------------------------
target-arm queue:
* i.MX: move i.MX31 CCM object to register array
* xilinx_axidma: remove dead code
* disas/libvixl: Update to upstream VIXL 1.12
* virt: Support legacy -nic command line syntax
----------------------------------------------------------------
Andrew Jones (1):
hw/dma/xilinx_axidma: remove dead code
Ashok Kumar (1):
hw/arm/virt: Support legacy -nic command line syntax
Jean-Christophe DUBOIS (1):
i.MX: move i.MX31 CCM object to register array
Peter Maydell (1):
disas/libvixl: Update to upstream VIXL 1.12
disas/arm-a64.cc | 2 +-
disas/libvixl/Makefile.objs | 9 +-
disas/libvixl/README | 3 +-
disas/libvixl/a64/assembler-a64.h | 2353 ----------
disas/libvixl/a64/disasm-a64.cc | 1954 ---------
disas/libvixl/a64/instructions-a64.cc | 314 --
disas/libvixl/a64/instructions-a64.h | 384 --
disas/libvixl/vixl/a64/assembler-a64.h | 4624 ++++++++++++++++++++
disas/libvixl/{ => vixl}/a64/constants-a64.h | 967 +++-
disas/libvixl/{ => vixl}/a64/cpu-a64.h | 6 +-
disas/libvixl/{ => vixl}/a64/decoder-a64.cc | 210 +-
disas/libvixl/{ => vixl}/a64/decoder-a64.h | 58 +-
disas/libvixl/vixl/a64/disasm-a64.cc | 3487 +++++++++++++++
disas/libvixl/{ => vixl}/a64/disasm-a64.h | 17 +-
disas/libvixl/vixl/a64/instructions-a64.cc | 622 +++
disas/libvixl/vixl/a64/instructions-a64.h | 757 ++++
disas/libvixl/{ => vixl}/code-buffer.h | 2 +-
.../{utils.cc => vixl/compiler-intrinsics.cc} | 137 +-
disas/libvixl/vixl/compiler-intrinsics.h | 155 +
disas/libvixl/{ => vixl}/globals.h | 82 +-
disas/libvixl/vixl/invalset.h | 775 ++++
disas/libvixl/{ => vixl}/platform.h | 2 +-
disas/libvixl/vixl/utils.cc | 142 +
disas/libvixl/{ => vixl}/utils.h | 115 +-
hw/arm/virt.c | 14 +
hw/dma/xilinx_axidma.c | 10 -
hw/misc/imx31_ccm.c | 188 +-
include/hw/misc/imx31_ccm.h | 38 +-
28 files changed, 12118 insertions(+), 5309 deletions(-)
delete mode 100644 disas/libvixl/a64/assembler-a64.h
delete mode 100644 disas/libvixl/a64/disasm-a64.cc
delete mode 100644 disas/libvixl/a64/instructions-a64.cc
delete mode 100644 disas/libvixl/a64/instructions-a64.h
create mode 100644 disas/libvixl/vixl/a64/assembler-a64.h
rename disas/libvixl/{ => vixl}/a64/constants-a64.h (51%)
rename disas/libvixl/{ => vixl}/a64/cpu-a64.h (96%)
rename disas/libvixl/{ => vixl}/a64/decoder-a64.cc (81%)
rename disas/libvixl/{ => vixl}/a64/decoder-a64.h (82%)
create mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc
rename disas/libvixl/{ => vixl}/a64/disasm-a64.h (94%)
create mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc
create mode 100644 disas/libvixl/vixl/a64/instructions-a64.h
rename disas/libvixl/{ => vixl}/code-buffer.h (99%)
rename disas/libvixl/{utils.cc => vixl/compiler-intrinsics.cc} (60%)
create mode 100644 disas/libvixl/vixl/compiler-intrinsics.h
rename disas/libvixl/{ => vixl}/globals.h (52%)
create mode 100644 disas/libvixl/vixl/invalset.h
rename disas/libvixl/{ => vixl}/platform.h (98%)
create mode 100644 disas/libvixl/vixl/utils.cc
rename disas/libvixl/{ => vixl}/utils.h (68%)
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v2 0/4] target-arm queue
2016-01-11 16:09 [Qemu-devel] [PULL v2 0/4] target-arm queue Peter Maydell
@ 2016-01-11 16:33 ` Peter Maydell
0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2016-01-11 16:33 UTC (permalink / raw)
To: QEMU Developers
On 11 January 2016 at 16:09, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> v2, dropping the xlnx high ram regions patch.
>
> -- PMM
>
>
>
> The following changes since commit ac0d9dbf33608d0b178e0bd414ec7397ada17834:
>
> Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160111' into staging (2016-01-11 14:22:04 +0000)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160111-1
>
> for you to fetch changes up to fea9b3ca9cc4685f89e0b929a61e51098fbb4f49:
>
> hw/arm/virt: Support legacy -nic command line syntax (2016-01-11 16:04:50 +0000)
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [PULL v2 0/4] target-arm queue
@ 2016-09-06 19:03 Peter Maydell
2016-09-08 9:40 ` Peter Maydell
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2016-09-06 19:03 UTC (permalink / raw)
To: qemu-devel
v2 pull:
* dropped the ast2500 patches
* fix ast2400 memory controller format string bug
thanks
-- PMM
The following changes since commit 2926375cffce464fde6b4dabaed1e133d549af39:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2016-09-06 17:18:17 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160906-1
for you to fetch changes up to c827c06a4dd6c768eeb3aaa6af6cfd29663116af:
block: m25p80: Fix vmstate structure name (2016-09-06 19:52:18 +0100)
----------------------------------------------------------------
target-arm queue:
* fix incorrect LPAE bit in FSR for alignment faults
* ACPI: fix the AML ID format for CPU devices to work for
large numbers of CPUs
* ast2400: add memory controller device model
* m25p80: fix the vmstate structure name (migration break)
----------------------------------------------------------------
Cédric Le Goater (1):
ast2400: add a memory controller device model
Marcin Krzeminski (1):
block: m25p80: Fix vmstate structure name
Sergey Sorokin (1):
target-arm: Fix lpae bit in FSR on an alignment fault
Wei Huang (1):
ARM: ACPI: fix the AML ID format for CPU devices
hw/arm/ast2400.c | 15 +++
hw/arm/virt-acpi-build.c | 2 +-
hw/block/m25p80.c | 29 +++--
hw/misc/Makefile.objs | 2 +-
hw/misc/aspeed_sdmc.c | 263 ++++++++++++++++++++++++++++++++++++++++++
include/hw/arm/ast2400.h | 2 +
include/hw/misc/aspeed_sdmc.h | 31 +++++
target-arm/op_helper.c | 2 +-
8 files changed, 328 insertions(+), 18 deletions(-)
create mode 100644 hw/misc/aspeed_sdmc.c
create mode 100644 include/hw/misc/aspeed_sdmc.h
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v2 0/4] target-arm queue
2016-09-06 19:03 Peter Maydell
@ 2016-09-08 9:40 ` Peter Maydell
2016-09-09 6:50 ` Cédric Le Goater
0 siblings, 1 reply; 6+ messages in thread
From: Peter Maydell @ 2016-09-08 9:40 UTC (permalink / raw)
To: QEMU Developers
On 6 September 2016 at 20:03, Peter Maydell <peter.maydell@linaro.org> wrote:
> v2 pull:
> * dropped the ast2500 patches
> * fix ast2400 memory controller format string bug
>
> thanks
> -- PMM
>
>
> The following changes since commit 2926375cffce464fde6b4dabaed1e133d549af39:
>
> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2016-09-06 17:18:17 +0100)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160906-1
>
> for you to fetch changes up to c827c06a4dd6c768eeb3aaa6af6cfd29663116af:
>
> block: m25p80: Fix vmstate structure name (2016-09-06 19:52:18 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * fix incorrect LPAE bit in FSR for alignment faults
> * ACPI: fix the AML ID format for CPU devices to work for
> large numbers of CPUs
> * ast2400: add memory controller device model
> * m25p80: fix the vmstate structure name (migration break)
>
Applied, thanks.
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v2 0/4] target-arm queue
2016-09-08 9:40 ` Peter Maydell
@ 2016-09-09 6:50 ` Cédric Le Goater
2016-09-09 10:33 ` Peter Maydell
0 siblings, 1 reply; 6+ messages in thread
From: Cédric Le Goater @ 2016-09-09 6:50 UTC (permalink / raw)
To: Peter Maydell, QEMU Developers
On 09/08/2016 11:40 AM, Peter Maydell wrote:
> On 6 September 2016 at 20:03, Peter Maydell <peter.maydell@linaro.org> wrote:
>> v2 pull:
>> * dropped the ast2500 patches
>> * fix ast2400 memory controller format string bug
>>
>> thanks
>> -- PMM
>>
>>
>> The following changes since commit 2926375cffce464fde6b4dabaed1e133d549af39:
>>
>> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2016-09-06 17:18:17 +0100)
>>
>> are available in the git repository at:
>>
>> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160906-1
>>
>> for you to fetch changes up to c827c06a4dd6c768eeb3aaa6af6cfd29663116af:
>>
>> block: m25p80: Fix vmstate structure name (2016-09-06 19:52:18 +0100)
>>
>> ----------------------------------------------------------------
>> target-arm queue:
>> * fix incorrect LPAE bit in FSR for alignment faults
>> * ACPI: fix the AML ID format for CPU devices to work for
>> large numbers of CPUs
>> * ast2400: add memory controller device model
>> * m25p80: fix the vmstate structure name (migration break)
>>
>
> Applied, thanks.
Hello Peter,
I have a little patchset fixing what you have asked for
regarding the RAM setting in Aspeed, but it depends on
the ast2500. So I suppose I should wait for the next
merge before sending ?
Thanks,
C.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PULL v2 0/4] target-arm queue
2016-09-09 6:50 ` Cédric Le Goater
@ 2016-09-09 10:33 ` Peter Maydell
0 siblings, 0 replies; 6+ messages in thread
From: Peter Maydell @ 2016-09-09 10:33 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: QEMU Developers
On 9 September 2016 at 07:50, Cédric Le Goater <clg@kaod.org> wrote:
> Hello Peter,
>
> I have a little patchset fixing what you have asked for
> regarding the RAM setting in Aspeed, but it depends on
> the ast2500. So I suppose I should wait for the next
> merge before sending ?
I dropped those patches, so you'll need to respin them
anyway. You can include the ram setting stuff in that
patchset (squashed in or as an extra patch as you see fit).
thanks
-- PMM
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-09-09 10:34 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-01-11 16:09 [Qemu-devel] [PULL v2 0/4] target-arm queue Peter Maydell
2016-01-11 16:33 ` Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2016-09-06 19:03 Peter Maydell
2016-09-08 9:40 ` Peter Maydell
2016-09-09 6:50 ` Cédric Le Goater
2016-09-09 10:33 ` Peter Maydell
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).