[Qemu-devel] [V3 4/4] hw/pci-host: Emulate AMD IO MMU

[David Kiarie <davidkiarie4@gmail.com>]

Support AMD IO MMU emulation in q35 and piix chipsets

Signed-off-by: David Kiarie <davidkiarie4@gmail.com>
---
 hw/pci-host/piix.c | 11 +++++++++++
 hw/pci-host/q35.c  | 16 ++++++++++++++--
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 924f0fa..19e2930 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -35,6 +35,7 @@
 #include "hw/i386/ioapic.h"
 #include "qapi/visitor.h"
 #include "qemu/error-report.h"
+#include "hw/i386/amd_iommu.h"
 
 /*
  * I440FX chipset data sheet.
@@ -297,6 +298,16 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp)
 
     sysbus_add_io(sbd, 0xcfc, &s->data_mem);
     sysbus_init_ioports(sbd, 0xcfc, 4);
+
+    /* AMD IOMMU (AMD-Vi) */
+    if (g_strcmp0(object_property_get_str(qdev_get_machine(), "iommu", NULL),
+                  "amd") == 0) {
+        AMDIOMMUState *iommu_state;
+        PCIDevice *iommu;
+        iommu = pci_create_simple(s->bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
+        iommu_state = AMD_IOMMU_DEVICE(iommu);
+        pci_setup_iommu(s->bus, bridge_host_amd_iommu, iommu_state);
+    }
 }
 
 static void i440fx_realize(PCIDevice *dev, Error **errp)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 1fb4707..dd4c822 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -30,6 +30,7 @@
 #include "hw/hw.h"
 #include "hw/pci-host/q35.h"
 #include "qapi/visitor.h"
+#include "hw/i386/amd_iommu.h"
 
 /****************************************************************************
  * Q35 host
@@ -505,10 +506,21 @@ static void mch_realize(PCIDevice *d, Error **errp)
                  mch->pci_address_space, &mch->pam_regions[i+1],
                  PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
     }
-    /* Intel IOMMU (VT-d) */
-    if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) {
+
+    char *iommu = object_property_get_str(qdev_get_machine(), "iommu", NULL);
+
+    if (g_strcmp0(iommu, "intel") == 0) {
+        /* Intel IOMMU (VT-d) */
         mch_init_dmar(mch);
+    } else if (g_strcmp0(iommu, "amd") == 0) {
+        AMDIOMMUState *iommu_state;
+        PCIDevice *iommu;
+        PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch)));
+        iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE);
+        iommu_state = AMD_IOMMU_DEVICE(iommu);
+        pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state);
     }
+    g_free(iommu);
 }
 
 uint64_t mch_mcfg_base(void)
-- 
2.1.4