From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org, qemu-arm@nongnu.org,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH v3 10/19] exec.c: Use correct AddressSpace in watch_mem_read and watch_mem_write
Date: Thu, 14 Jan 2016 13:52:46 +0000 [thread overview]
Message-ID: <1452779575-32582-11-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1452779575-32582-1-git-send-email-peter.maydell@linaro.org>
In the watchpoint access routines watch_mem_read and watch_mem_write,
find the correct AddressSpace to use from current_cpu and the memory
transaction attributes, rather than always assuming address_space_memory.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
exec.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/exec.c b/exec.c
index 590a018..0e4f681 100644
--- a/exec.c
+++ b/exec.c
@@ -2056,17 +2056,19 @@ static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
{
MemTxResult res;
uint64_t data;
+ int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
+ AddressSpace *as = current_cpu->cpu_ases[asidx].as;
check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
switch (size) {
case 1:
- data = address_space_ldub(&address_space_memory, addr, attrs, &res);
+ data = address_space_ldub(as, addr, attrs, &res);
break;
case 2:
- data = address_space_lduw(&address_space_memory, addr, attrs, &res);
+ data = address_space_lduw(as, addr, attrs, &res);
break;
case 4:
- data = address_space_ldl(&address_space_memory, addr, attrs, &res);
+ data = address_space_ldl(as, addr, attrs, &res);
break;
default: abort();
}
@@ -2079,17 +2081,19 @@ static MemTxResult watch_mem_write(void *opaque, hwaddr addr,
MemTxAttrs attrs)
{
MemTxResult res;
+ int asidx = cpu_asidx_from_attrs(current_cpu, attrs);
+ AddressSpace *as = current_cpu->cpu_ases[asidx].as;
check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_WRITE);
switch (size) {
case 1:
- address_space_stb(&address_space_memory, addr, val, attrs, &res);
+ address_space_stb(as, addr, val, attrs, &res);
break;
case 2:
- address_space_stw(&address_space_memory, addr, val, attrs, &res);
+ address_space_stw(as, addr, val, attrs, &res);
break;
case 4:
- address_space_stl(&address_space_memory, addr, val, attrs, &res);
+ address_space_stl(as, addr, val, attrs, &res);
break;
default: abort();
}
--
1.9.1
next prev parent reply other threads:[~2016-01-14 14:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-14 13:52 [Qemu-devel] [PATCH v3 00/19] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 01/19] exec.c: Don't set cpu->as until cpu_address_space_init Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 02/19] exec.c: Allow target CPUs to define multiple AddressSpaces Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 03/19] exec-all.h: Document tlb_set_page_with_attrs, tlb_set_page Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 04/19] cpu: Add new get_phys_page_attrs_debug() method Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 05/19] cpu: Add new asidx_from_attrs() method Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 06/19] cputlb.c: Use correct address space when looking up MemoryRegionSection Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 07/19] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 08/19] exec.c: Add cpu_get_address_space() Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 09/19] exec.c: Use cpu_get_phys_page_attrs_debug Peter Maydell
2016-01-14 13:52 ` Peter Maydell [this message]
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 11/19] memory: Add address_space_init_shareable() Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 12/19] qom/cpu: Add MemoryRegion property Peter Maydell
2016-01-14 23:37 ` [Qemu-devel] [Qemu-arm] " Peter Crosthwaite
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 13/19] target-arm: Add QOM property for Secure memory region Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 14/19] target-arm: Implement asidx_from_attrs Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 15/19] target-arm: Implement cpu_get_phys_page_attrs_debug Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 16/19] target-arm: Support multiple address spaces in page table walks Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 17/19] hw/arm/virt: Wire up memory region to CPUs explicitly Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 18/19] hw/arm/virt: add secure memory region and UART Peter Maydell
2016-01-14 13:52 ` [Qemu-devel] [PATCH v3 19/19] HACK: rearrange the virt memory map to suit OP-TEE Peter Maydell
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