From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49973) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aMGsT-0004Hr-0H for qemu-devel@nongnu.org; Thu, 21 Jan 2016 10:10:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aMGsR-0006tP-Pd for qemu-devel@nongnu.org; Thu, 21 Jan 2016 10:10:24 -0500 Received: from mx1.redhat.com ([209.132.183.28]:33769) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aMGsR-0006tL-K9 for qemu-devel@nongnu.org; Thu, 21 Jan 2016 10:10:23 -0500 From: Eduardo Habkost Date: Thu, 21 Jan 2016 13:09:37 -0200 Message-Id: <1453388981-24807-9-git-send-email-ehabkost@redhat.com> In-Reply-To: <1453388981-24807-1-git-send-email-ehabkost@redhat.com> References: <1453388981-24807-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [PULL 08/12] target-i386: Add suffixes to MMReg struct fields List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org, Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson This will ensure we never use the MMX_* and ZMM_* macros with the wrong struct type. Reviewed-by: Richard Henderson Signed-off-by: Eduardo Habkost --- target-i386/cpu.h | 66 +++++++++++++++++++++++++++---------------------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 70cf66d..77e62b2 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -725,18 +725,18 @@ typedef struct SegmentCache { uint32_t flags; } SegmentCache; -#define MMREG_UNION(bits) \ - union { \ - uint8_t _b[(bits)/8]; \ - uint16_t _w[(bits)/16]; \ - uint32_t _l[(bits)/32]; \ - uint64_t _q[(bits)/64]; \ - float32 _s[(bits)/32]; \ - float64 _d[(bits)/64]; \ +#define MMREG_UNION(n, bits) \ + union n { \ + uint8_t _b_##n[(bits)/8]; \ + uint16_t _w_##n[(bits)/16]; \ + uint32_t _l_##n[(bits)/32]; \ + uint64_t _q_##n[(bits)/64]; \ + float32 _s_##n[(bits)/32]; \ + float64 _d_##n[(bits)/64]; \ } -typedef MMREG_UNION(512) ZMMReg; -typedef MMREG_UNION(64) MMXReg; +typedef MMREG_UNION(ZMMReg, 512) ZMMReg; +typedef MMREG_UNION(MMXReg, 64) MMXReg; typedef struct BNDReg { uint64_t lb; @@ -749,31 +749,31 @@ typedef struct BNDCSReg { } BNDCSReg; #ifdef HOST_WORDS_BIGENDIAN -#define ZMM_B(n) _b[63 - (n)] -#define ZMM_W(n) _w[31 - (n)] -#define ZMM_L(n) _l[15 - (n)] -#define ZMM_S(n) _s[15 - (n)] -#define ZMM_Q(n) _q[7 - (n)] -#define ZMM_D(n) _d[7 - (n)] - -#define MMX_B(n) _b[7 - (n)] -#define MMX_W(n) _w[3 - (n)] -#define MMX_L(n) _l[1 - (n)] -#define MMX_S(n) _s[1 - (n)] +#define ZMM_B(n) _b_ZMMReg[63 - (n)] +#define ZMM_W(n) _w_ZMMReg[31 - (n)] +#define ZMM_L(n) _l_ZMMReg[15 - (n)] +#define ZMM_S(n) _s_ZMMReg[15 - (n)] +#define ZMM_Q(n) _q_ZMMReg[7 - (n)] +#define ZMM_D(n) _d_ZMMReg[7 - (n)] + +#define MMX_B(n) _b_MMXReg[7 - (n)] +#define MMX_W(n) _w_MMXReg[3 - (n)] +#define MMX_L(n) _l_MMXReg[1 - (n)] +#define MMX_S(n) _s_MMXReg[1 - (n)] #else -#define ZMM_B(n) _b[n] -#define ZMM_W(n) _w[n] -#define ZMM_L(n) _l[n] -#define ZMM_S(n) _s[n] -#define ZMM_Q(n) _q[n] -#define ZMM_D(n) _d[n] - -#define MMX_B(n) _b[n] -#define MMX_W(n) _w[n] -#define MMX_L(n) _l[n] -#define MMX_S(n) _s[n] +#define ZMM_B(n) _b_ZMMReg[n] +#define ZMM_W(n) _w_ZMMReg[n] +#define ZMM_L(n) _l_ZMMReg[n] +#define ZMM_S(n) _s_ZMMReg[n] +#define ZMM_Q(n) _q_ZMMReg[n] +#define ZMM_D(n) _d_ZMMReg[n] + +#define MMX_B(n) _b_MMXReg[n] +#define MMX_W(n) _w_MMXReg[n] +#define MMX_L(n) _l_MMXReg[n] +#define MMX_S(n) _s_MMXReg[n] #endif -#define MMX_Q(n) _q[n] +#define MMX_Q(n) _q_MMXReg[n] typedef union { floatx80 d __attribute__((aligned(16))); -- 2.1.0