From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38407) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOBE8-0003s7-8H for qemu-devel@nongnu.org; Tue, 26 Jan 2016 16:32:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aOBE3-0006eB-JF for qemu-devel@nongnu.org; Tue, 26 Jan 2016 16:32:40 -0500 Received: from smtp2-g21.free.fr ([2a01:e0c:1:1599::11]:8375) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOBE3-0006dz-DN for qemu-devel@nongnu.org; Tue, 26 Jan 2016 16:32:35 -0500 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Tue, 26 Jan 2016 22:32:09 +0100 Message-Id: <1453843944-26833-5-git-send-email-hpoussin@reactos.org> In-Reply-To: <1453843944-26833-1-git-send-email-hpoussin@reactos.org> References: <1453843944-26833-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 04/19] i8257: rename struct dma_regs to I8257Regs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Paolo Bonzini , John Snow , "Michael S. Tsirkin" Signed-off-by: Herv=C3=A9 Poussineau --- hw/dma/i8257.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index f4fcf39..e0713a5 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -37,7 +37,7 @@ #define ldebug(...) #endif =20 -struct dma_regs { +typedef struct I8257Regs { int now[2]; uint16_t base[2]; uint8_t mode; @@ -47,7 +47,7 @@ struct dma_regs { uint8_t eop; DMA_transfer_handler transfer_handler; void *opaque; -}; +} I8257Regs; =20 #define ADDR 0 #define COUNT 1 @@ -58,7 +58,7 @@ typedef struct I8257State { uint8_t mask; uint8_t flip_flop; int dshift; - struct dma_regs regs[4]; + I8257Regs regs[4]; MemoryRegion channel_io; MemoryRegion cont_io; } I8257State; @@ -138,7 +138,7 @@ static uint32_t read_pageh (void *opaque, uint32_t np= ort) =20 static inline void init_chan(I8257State *d, int ichan) { - struct dma_regs *r; + I8257Regs *r; =20 r =3D d->regs + ichan; r->now[ADDR] =3D r->base[ADDR] << d->dshift; @@ -158,7 +158,7 @@ static uint64_t read_chan(void *opaque, hwaddr nport,= unsigned size) { I8257State *d =3D opaque; int ichan, nreg, iport, ff, val, dir; - struct dma_regs *r; + I8257Regs *r; =20 iport =3D (nport >> d->dshift) & 0x0f; ichan =3D iport >> 1; @@ -181,7 +181,7 @@ static void write_chan(void *opaque, hwaddr nport, ui= nt64_t data, { I8257State *d =3D opaque; int iport, ichan, nreg; - struct dma_regs *r; + I8257Regs *r; =20 iport =3D (nport >> d->dshift) & 0x0f; ichan =3D iport >> 1; @@ -337,7 +337,7 @@ void DMA_release_DREQ (int nchan) static void channel_run (int ncont, int ichan) { int n; - struct dma_regs *r =3D &dma_controllers[ncont].regs[ichan]; + I8257Regs *r =3D &dma_controllers[ncont].regs[ichan]; #ifdef DEBUG_DMA int dir, opmode; =20 @@ -408,7 +408,7 @@ void DMA_register_channel (int nchan, DMA_transfer_handler transfer_handler, void *opaque) { - struct dma_regs *r; + I8257Regs *r; int ichan, ncont; =20 ncont =3D nchan > 3; @@ -421,7 +421,7 @@ void DMA_register_channel (int nchan, =20 int DMA_read_memory (int nchan, void *buf, int pos, int len) { - struct dma_regs *r =3D &dma_controllers[nchan > 3].regs[nchan & 3]; + I8257Regs *r =3D &dma_controllers[nchan > 3].regs[nchan & 3]; hwaddr addr =3D ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now= [ADDR]; =20 if (r->mode & 0x20) { @@ -443,7 +443,7 @@ int DMA_read_memory (int nchan, void *buf, int pos, i= nt len) =20 int DMA_write_memory (int nchan, void *buf, int pos, int len) { - struct dma_regs *r =3D &dma_controllers[nchan > 3].regs[nchan & 3]; + I8257Regs *r =3D &dma_controllers[nchan > 3].regs[nchan & 3]; hwaddr addr =3D ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now= [ADDR]; =20 if (r->mode & 0x20) { @@ -552,18 +552,18 @@ static void dma_init2(I8257State *d, int base, int = dshift, } } =20 -static const VMStateDescription vmstate_dma_regs =3D { +static const VMStateDescription vmstate_i8257_regs =3D { .name =3D "dma_regs", .version_id =3D 1, .minimum_version_id =3D 1, .fields =3D (VMStateField[]) { - VMSTATE_INT32_ARRAY(now, struct dma_regs, 2), - VMSTATE_UINT16_ARRAY(base, struct dma_regs, 2), - VMSTATE_UINT8(mode, struct dma_regs), - VMSTATE_UINT8(page, struct dma_regs), - VMSTATE_UINT8(pageh, struct dma_regs), - VMSTATE_UINT8(dack, struct dma_regs), - VMSTATE_UINT8(eop, struct dma_regs), + VMSTATE_INT32_ARRAY(now, I8257Regs, 2), + VMSTATE_UINT16_ARRAY(base, I8257Regs, 2), + VMSTATE_UINT8(mode, I8257Regs), + VMSTATE_UINT8(page, I8257Regs), + VMSTATE_UINT8(pageh, I8257Regs), + VMSTATE_UINT8(dack, I8257Regs), + VMSTATE_UINT8(eop, I8257Regs), VMSTATE_END_OF_LIST() } }; @@ -585,8 +585,8 @@ static const VMStateDescription vmstate_dma =3D { VMSTATE_UINT8(mask, I8257State), VMSTATE_UINT8(flip_flop, I8257State), VMSTATE_INT32(dshift, I8257State), - VMSTATE_STRUCT_ARRAY(regs, I8257State, 4, 1, vmstate_dma_regs, - struct dma_regs), + VMSTATE_STRUCT_ARRAY(regs, I8257State, 4, 1, vmstate_i8257_regs, + I8257Regs), VMSTATE_END_OF_LIST() } }; --=20 2.1.4