From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51636) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR3KU-0007Mm-9u for qemu-devel@nongnu.org; Wed, 03 Feb 2016 14:43:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aR3KR-0003OG-5J for qemu-devel@nongnu.org; Wed, 03 Feb 2016 14:43:06 -0500 Received: from mx1.redhat.com ([209.132.183.28]:47524) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR3KQ-0003OC-W4 for qemu-devel@nongnu.org; Wed, 03 Feb 2016 14:43:03 -0500 Message-ID: <1454528580.18969.10.camel@redhat.com> From: Alex Williamson Date: Wed, 03 Feb 2016 12:43:00 -0700 In-Reply-To: <1454490248.4967.51.camel@redhat.com> References: <20160202201023.5353.65948.stgit@gimli.home> <1454490248.4967.51.camel@redhat.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [SeaBIOS] [RFC PATCH v2] fw/pci: Add support for mapping Intel IGD OpRegion via QEMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: seabios@seabios.org, qemu-devel@nongnu.org On Wed, 2016-02-03 at 10:04 +0100, Gerd Hoffmann wrote: > =C2=A0 Hi, >=C2=A0 > > +static void intel_igd_opregion_setup(struct pci_device *dev, void *a= rg) > > +{ > > +=C2=A0=C2=A0=C2=A0=C2=A0struct romfile_s *file =3D romfile_find("etc= /igd-opregion"); >=C2=A0 > Is it possible to have multiple igd devices in a single machine? > So, should we include the pci address in the file name? >=C2=A0 > Guess not needed, it's chipset graphics after all ... Hmm, I think that's probably a pretty good observation, we don't want to revisit this if vGPUs need/want an OpRegion or if Intel decides to start allowing more than one per system.=C2=A0=C2=A0Either could pretty easily = introduce multiple into a VM. > > +=C2=A0=C2=A0=C2=A0=C2=A0pci_config_writel(bdf, 0xFC, cpu_to_le32((u3= 2)opregion)); >=C2=A0 > Looks a bit funny in code which is never ever going to run on big endia= n > machines ;) Clearly I stole it from code that wasn't assuming little endian and figured "why not", it's a nop anyway and one less thing to care about when IBM licenses Intel graphics for POWER systems... ;) > Patch looks good to me. Thanks! Alex