From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43670) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSpEB-0003nO-2f for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aSpE9-0006sv-1i for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:55 -0500 Received: from mail-wm0-x233.google.com ([2a00:1450:400c:c09::233]:33530) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSpE8-0006sl-Rs for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:52 -0500 Received: by mail-wm0-x233.google.com with SMTP id g62so141574434wme.0 for ; Mon, 08 Feb 2016 09:03:52 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Mon, 8 Feb 2016 18:03:15 +0100 Message-Id: <1454950999-64128-25-git-send-email-pbonzini@redhat.com> In-Reply-To: <1454950999-64128-1-git-send-email-pbonzini@redhat.com> References: <1454950999-64128-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 24/28] target-i386: Tidy gen_add_A0_im List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Richard Henderson From: Richard Henderson Merge gen_op_addl_A0_im and gen_op_addq_A0_im into gen_add_A0_im and clean up the ifdef. Replace the one remaining user of gen_op_addl_A0_im with gen_add_A0_im. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-Id: <1450379966-28198-10-git-send-email-rth@twiddle.net> Signed-off-by: Paolo Bonzini --- target-i386/translate.c | 27 +++++---------------------- 1 file changed, 5 insertions(+), 22 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 6b901b1..e9d61df 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -373,29 +373,12 @@ static inline void gen_op_mov_v_reg(TCGMemOp ot, TCGv t0, int reg) } } -static inline void gen_op_addl_A0_im(int32_t val) -{ - tcg_gen_addi_tl(cpu_A0, cpu_A0, val); -#ifdef TARGET_X86_64 - tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff); -#endif -} - -#ifdef TARGET_X86_64 -static inline void gen_op_addq_A0_im(int64_t val) -{ - tcg_gen_addi_tl(cpu_A0, cpu_A0, val); -} -#endif - static void gen_add_A0_im(DisasContext *s, int val) { -#ifdef TARGET_X86_64 - if (CODE64(s)) - gen_op_addq_A0_im(val); - else -#endif - gen_op_addl_A0_im(val); + tcg_gen_addi_tl(cpu_A0, cpu_A0, val); + if (!CODE64(s)) { + tcg_gen_ext32u_tl(cpu_A0, cpu_A0); + } } static inline void gen_op_jmp_v(TCGv dest) @@ -6229,7 +6212,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, exception */ gen_op_jmp_v(cpu_T[0]); /* pop selector */ - gen_op_addl_A0_im(1 << dflag); + gen_add_A0_im(s, 1 << dflag); gen_op_ld_v(s, dflag, cpu_T[0], cpu_A0); gen_op_movl_seg_T0_vm(R_CS); /* add stack offset */ -- 1.8.3.1