From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40654) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTLfv-0007Vq-KH for qemu-devel@nongnu.org; Tue, 09 Feb 2016 22:42:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aTLfr-0004HN-Ff for qemu-devel@nongnu.org; Tue, 09 Feb 2016 22:42:43 -0500 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:33913) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTLfr-0004HA-BV for qemu-devel@nongnu.org; Tue, 09 Feb 2016 22:42:39 -0500 Received: by mail-qk0-x241.google.com with SMTP id u128so253369qkh.1 for ; Tue, 09 Feb 2016 19:42:39 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Wed, 10 Feb 2016 14:41:42 +1100 Message-Id: <1455075706-9786-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v3 0/4] tcg: Improve sparc register windows List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk, aurelien@aurel32.net The bulk of the original patch set has been reviewed and comitted. But the actual end result is still outstanding. r~ Richard Henderson (4): tcg: Implement indirect memory registers tcg: Allocate indirect_base temporaries in a different order target-sparc: Tidy global register initialization target-sparc: Use global registers for the register window target-sparc/translate.c | 196 ++++++++++++++++++++++------------------------- tcg/tcg.c | 136 ++++++++++++++++++++++---------- tcg/tcg.h | 2 + 3 files changed, 191 insertions(+), 143 deletions(-) -- 2.5.0