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From: Thomas Huth <thuth@redhat.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Cc: qemu-devel@nongnu.org, laurent@vivier.eu
Subject: [Qemu-devel] [PATCH 2/4] hw/ppc/spapr: Implement h_set_dabr
Date: Wed, 10 Feb 2016 19:09:10 +0100	[thread overview]
Message-ID: <1455127752-17293-3-git-send-email-thuth@redhat.com> (raw)
In-Reply-To: <1455127752-17293-1-git-send-email-thuth@redhat.com>

According to LoPAPR, h_set_dabr should simply set DABRX to 3
(if the register is available), and load the parameter into DABR.
If DABRX is not available, the hypervisor has to check the
"Breakpoint Translation" bit of the DABR register first.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 hw/ppc/spapr_hcall.c | 26 +++++++++++++++++++++-----
 1 file changed, 21 insertions(+), 5 deletions(-)

diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 58103ef..6b9d512 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -38,6 +38,12 @@ static void set_spr(CPUState *cs, int spr, target_ulong value,
     run_on_cpu(cs, do_spr_sync, &s);
 }
 
+static bool has_spr(PowerPCCPU *cpu, int spr)
+{
+    /* We can test whether the SPR is defined by checking for a valid name */
+    return cpu->env.spr_cb[spr].name != NULL;
+}
+
 static inline bool valid_pte_index(CPUPPCState *env, target_ulong pte_index)
 {
     /*
@@ -344,8 +350,20 @@ static target_ulong h_set_sprg0(PowerPCCPU *cpu, sPAPRMachineState *spapr,
 static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                                target_ulong opcode, target_ulong *args)
 {
-    /* FIXME: actually implement this */
-    return H_HARDWARE;
+    CPUState *cs = CPU(cpu);
+
+    if (!has_spr(cpu, SPR_DABR)) {
+        return H_HARDWARE;          /* DABR register not available */
+    }
+
+    if (has_spr(cpu, SPR_DABRX)) {
+        set_spr(cs, SPR_DABRX, 0x3, -1L);
+    } else if (!(args[0] & 0x4)) {  /* Breakpoint Translation set? */
+        return H_RESERVED_DABR;
+    }
+
+    set_spr(cs, SPR_DABR, args[0], -1L);
+    return H_SUCCESS;
 }
 
 #define FLAGS_REGISTER_VPA         0x0000200000000000ULL
@@ -999,15 +1017,13 @@ static void hypercall_register_types(void)
     /* hcall-bulk */
     spapr_register_hypercall(H_BULK_REMOVE, h_bulk_remove);
 
-    /* hcall-dabr */
-    spapr_register_hypercall(H_SET_DABR, h_set_dabr);
-
     /* hcall-splpar */
     spapr_register_hypercall(H_REGISTER_VPA, h_register_vpa);
     spapr_register_hypercall(H_CEDE, h_cede);
 
     /* processor register resource access h-calls */
     spapr_register_hypercall(H_SET_SPRG0, h_set_sprg0);
+    spapr_register_hypercall(H_SET_DABR, h_set_dabr);
     spapr_register_hypercall(H_SET_MODE, h_set_mode);
 
     /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
-- 
1.8.3.1

  parent reply	other threads:[~2016-02-10 18:09 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-10 18:09 [Qemu-devel] [PATCH 0/4] hw/ppc/spapr: Add "Processor Register Hypervisor Resource Access" H-calls Thomas Huth
2016-02-10 18:09 ` [Qemu-devel] [PATCH 1/4] hw/ppc/spapr: Add h_set_sprg0 hypercall Thomas Huth
2016-02-10 23:30   ` David Gibson
2016-02-11  7:12     ` Thomas Huth
2016-02-10 18:09 ` Thomas Huth [this message]
2016-02-10 23:36   ` [Qemu-devel] [PATCH 2/4] hw/ppc/spapr: Implement h_set_dabr David Gibson
2016-02-10 18:09 ` [Qemu-devel] [PATCH 3/4] hw/ppc/spapr: Implement the h_set_xdabr hypercall Thomas Huth
2016-02-10 23:37   ` David Gibson
2016-02-10 18:09 ` [Qemu-devel] [PATCH 4/4] hw/ppc/spapr: Implement the h_page_init hypercall Thomas Huth
2016-02-10 23:47   ` David Gibson
2016-02-11  7:53     ` Thomas Huth

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